� ��� port0�okaysata-phy@a2000marvell,mvebu-sata-phyl 4� �sata'�okay�audio-controller@b0000marvell,dove-audiol "�  �internal �disabledaudio-controller@b4000marvell,dove-audiol @"� �internalextclk�okay��defaultpower-management@d0000marvell,dove-pmusimple-busl � ��� �� ��!.�2�domainsvpu-domain?Sh}gpu-domain?Sh}�thermal-diode@1cmarvell,dove-thermall \clock-gating-ctrl@38marvell,dove-gating-clockl8� �� core-clock@64marvell,dove-divider-clockld��pin-ctrl@200marvell,dove-pinctrll@� pmx-gpio-0�mpp0�gpiopmx-gpio-1�mpp1�gpio�pmx-gpio-2�mpp2�gpiopmx-gpio-3�mpp3�gpiopmx-gpio-4�mpp4�gpiopmx-gpio-5�mpp5�gpiopmx-gpio-6�mpp6�gpiopmx-gpio-7�mpp7�gpiopmx-gpio-8�mpp8�gpiopmx-gpio-9�mpp9�gpiopmx-pcie1-clkreq�mpp9�pex1pmx-gpio-10�mpp10�gpiopmx-gpio-11�mpp11�gpiopmx-pcie0-clkreq�mpp11�pex0pmx-gpio-12�mpp12�gpio�pmx-gpio-13�mpp13�gpiopmx-audio1-extclk�mpp13�audio1�pmx-gpio-14�mpp14�gpiopmx-gpio-15�mpp15�gpiopmx-gpio-16�mpp16�gpiopmx-gpio-17�mpp17�gpiopmx-gpio-18�mpp18�gpio�pmx-gpio-19�mpp19�gpio� pmx-gpio-20�mpp20�gpiopmx-gpio-21�mpp21�gpiopmx-camera �mpp_camera�camerapmx-camera-gpio �mpp_camera�gpiopmx-sdio0 �mpp_sdio0�sdio0�pmx-sdio0-gpio �mpp_sdio0�gpiopmx-sdio1 �mpp_sdio1�sdio1�pmx-sdio1-gpio �mpp_sdio1�gpiopmx-audio1-gpio �mpp_audio1�gpiopmx-audio1-i2s1-spdifo �mpp_audio1 �i2s1/spdifo�pmx-spi0 �mpp_spi0�spi0�pmx-spi0-gpio �mpp_spi0�gpiopmx-spi1-4-7�mpp4mpp5mpp6mpp7�spi1pmx-spi1-20-23�mpp20mpp21mpp22mpp23�spi1pmx-uart1 �mpp_uart1�uart1�pmx-uart1-gpio �mpp_uart1�gpiopmx-nand �mpp_nand�nandpmx-nand-gpo �mpp_nand�gpopmx-i2c1 �mpp17mpp19�twsipmx-i2c2 �mpp_audio1�twsipmx-ssp-i2c2 �mpp_audio1 �ssp/twsipmx-i2cmux-0�twsi �twsi-opt1�pmx-i2cmux-1�twsi �twsi-opt2�pmx-i2cmux-2�twsi �twsi-opt3�core-clocks@214marvell,dove-core-clockl�� gpio-ctrl@400marvell,orion-gpio��l � .�, <�gpio-ctrl@420marvell,orion-gpio��l � .�,=real-time-clock@8500marvell,orion-rtcl� global-config@e802c"marvell,dove-global-configsysconl�,gpio-ctrl@e8400marvell,orion-gpio��l� �lcd-controller@810000marvell,dove-lcdl�. �disabledlcd-controller@820000marvell,dove-lcdl�/ �disabledsram@ffffe000 mmio-sraml���� �gpu@840000��core vivante,gc0�l�@�okay�memoryOmemoryl@chosen#�console=ttyS0,115200n8 earlyprintkleds gpio-leds��defaultled-power�Power  �keepregulator-1regulator-fixed �USB Power�LK@LK@/BV h��defaultclocksoscillator fixed-clock��}x@�ir-receivergpio-ir-receiver  � �default #address-cells#size-cellscompatiblemodelinterrupt-parentgpio0gpio1gpio2device_typenext-level-cacheregmarvell,tauros2-cache-featuresphandlecoresstatusi2c-parentpinctrl-namespinctrl-0pinctrl-1pinctrl-2clock-frequency#clock-cellsclocksclock-namessilabs,pll-sourcesilabs,drive-strengthsilabs,multisynth-sourcesilabs,clock-sourcesilabs,pll-mastercontrollerpcie-mem-aperturepcie-io-aperturerangesmsi-parentbus-rangeassigned-addressesmarvell,pcie-port#interrupt-cellsinterrupt-namesinterruptsinterrupt-map-maskinterrupt-mapinterrupt-controllercell-indexspi-max-frequencyreg-shiftmarvell,#interruptsreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizedmacap,memcpydmacap,xormarvell,tx-checksum-limitlocal-mac-addressphy-handlecd-gpiosphysphy-namesnr-ports#phy-cells#reset-cells#power-domain-cellsmarvell,pmu_pwr_maskmarvell,pmu_iso_maskresetsmarvell,pinsmarvell,function#gpio-cellsgpio-controllerngpiospower-domainsbootargslabeldefault-stateregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highregulator-always-onregulator-boot-ongpio