� ���m8��( ��� rockchip,px30-evbrockchip,px30 +7Rockchip PX30 EVBaliases=/ethernet@ff360000G/i2c@ff180000L/i2c@ff190000Q/i2c@ff1a0000V/i2c@ff1b0000[/serial@ff030000c/serial@ff158000k/serial@ff160000s/serial@ff168000{/serial@ff170000�/serial@ff178000�/spi@ff1d0000�/spi@ff1d8000�/mmc@ff370000�/mmc@ff380000�/mmc@ff390000cpus+cpu@0�cpuarm,cortex-a35��psci����Z!cpu@1�cpuarm,cortex-a35��psci����Z!cpu@2�cpuarm,cortex-a35��psci����Z! cpu@3�cpuarm,cortex-a35��psci����Z! idle-states)pscicpu-sleeparm,idle-state6G^xo��!cluster-sleeparm,idle-state6G^�o��!opp-table-0operating-points-v2�!opp-600000000�#�F �~�~��p��@�opp-816000000�0�, ����p��@opp-1008000000�<� ������p��@opp-1200000000�G�� �� � �p��@opp-1296000000�M?d ��p�p�p��@arm-pmuarm,cortex-a35-pmu0�defg� display-subsystemrockchip,display-subsystem� �okayexternal-gmac-clock fixed-clock���� gmac_clkinpsci arm,psci-1.0�smctimerarm,armv8-timer0�   thermal-zonessoc-thermal(>�L�^ tripstrip-point-0npz��passivetrip-point-1nLz��passive!soc-critn�8z� �criticalcooling-mapsmap0� ����������map1� ����������gpu-thermal(d>�^ xin24m fixed-clock�n6xin24m!tpower-management@ff000000$rockchip,px30-pmusysconsimple-mfd��power-controllerrockchip,px30-power-controller�+!vpower-domain@5��<��power-domain@7���;��power-domain@9�  ��C@?��power-domain@10� @���978:��power-domain@11� ���K��power-domain@12� X���������D56��power-domain@13� (�����3� !"�power-domain@14��I�#�syscon@ff010000'rockchip,px30-pmugrfsysconsimple-mfd��+!�io-domains$rockchip,px30-pmu-io-voltage-domain�okay�$�$reboot-modesyscon-reboot-mode��RB��RB� RB�RB�RB�serial@ff030000$rockchip,px30-uartsnps,dw-apb-uart�� ��%%(baudclkapb_pclk4&&9txrxCMZdefault h'() �disabledi2s@ff060000rockchip,px30-i2s-tdm�� � �(mclk_txmclk_rxhclk4&&9txrxr*�� �tx-mrx-mZdefault0h+,-./0123456� �disabledi2s@ff070000&rockchip,px30-i2srockchip,rk3066-i2s�� � �(i2s_clki2s_hclk4&&9txrxZdefaulth789:��okayi2s@ff080000&rockchip,px30-i2srockchip,rk3066-i2s�� ��(i2s_clki2s_hclk4&&9txrxZdefaulth;<=>� �disabledinterrupt-controller@ff131000 arm,gic-400��@��� �@ �`  � !syscon@ff140000$rockchip,px30-grfsysconsimple-mfd��+!*io-domains rockchip,px30-io-voltage-domain�okay�?�@�A�$A?lvdsrockchip,px30-lvdsB"dphyr*,lvds �disabledports+port@0�+endpoint@0�<C!�endpoint@1�<D!�serial@ff158000$rockchip,px30-uartsnps,dw-apb-uart��� ��I(baudclkapb_pclk4&&9txrxCMZdefaulthEF�okayserial@ff160000$rockchip,px30-uartsnps,dw-apb-uart�� ��J(baudclkapb_pclk4&&9txrxCMZdefaulthG �disabledserial@ff168000$rockchip,px30-uartsnps,dw-apb-uart��� ��K(baudclkapb_pclk4&&9txrxCMZdefault hHIJ �disabledserial@ff170000$rockchip,px30-uartsnps,dw-apb-uart�� ��L(baudclkapb_pclk4&& 9txrxCMZdefault hKLM �disabledserial@ff178000$rockchip,px30-uartsnps,dw-apb-uart��� ��M(baudclkapb_pclk4& & 9txrxCMZdefault hNOP�okayi2c@ff180000&rockchip,px30-i2crockchip,rk3399-i2c���N (i2cpclk �ZdefaulthQ+�okaypmic@20rockchip,rk809�  R�ZdefaulthSLmxin32k{T�T�T�T�U�U�U�U�TregulatorsDCDC_REG1�vdd_log�~��p&q;O!�regulator-state-memay~�DCDC_REG2�vdd_arm�~��p&q;O!regulator-state-mem�y~�DCDC_REG3�vcc_ddr;Oregulator-state-memaDCDC_REG4�vcc_3v0�-��-��;O!Aregulator-state-memay-��DCDC_REG5 �vcc3v3_sys�2Z�2Z�;O!Uregulator-state-memay2Z�LDO_REG1�vcc_1v0�B@B@;Oregulator-state-memayB@LDO_REG2�vcc_1v8�w@w@;O!?regulator-state-memayw@LDO_REG3�vdd_1v0�B@B@;Oregulator-state-memayB@LDO_REG4 �vcc3v0_pmu�-��-��;O!$regulator-state-memay-��LDO_REG5 �vccio_sd�w@2Z�;O!@regulator-state-memay2Z�LDO_REG6�vcc_sd�2Z�2Z�O!regulator-state-memay2Z�LDO_REG7 �vcc2v8_dvp�*��*��O!Yregulator-state-mem�y*��LDO_REG8 �vcc1v8_dvp�w@w@O![regulator-state-memayw@LDO_REG9 �vcc1v5_dvp��`�`O!Zregulator-state-mem�y�`SWITCH_REG1 �vcc3v3_lcdO!WSWITCH_REG2 �vcc5v0_host;Oi2c@ff190000&rockchip,px30-i2crockchip,rk3399-i2c���O (i2cpclk �ZdefaulthV+�okaysensor@dasahi-kasei,ak8963�  �R�$�100010001touchscreen@14goodix,gt1151� R� �R �R �Wsensor@4c fsl,mma7660�L R�i2c@ff1a0000&rockchip,px30-i2crockchip,rk3399-i2c���P (i2cpclk � ZdefaulthX+�okay����2,ov5695@36 ovti,ov5695�6Y�4(xvclk*Z6[Zdefaulth\] �^portendpoint<_C!�i2c@ff1b0000&rockchip,px30-i2crockchip,rk3399-i2c��� Q (i2cpclk � Zdefaulth`+ �disabledspi@ff1d0000&rockchip,px30-spirockchip,rk3066-spi�� ��$U(spiclkapb_pclk4& & 9txrxZdefaulthabcd+ �disabledspi@ff1d8000&rockchip,px30-spirockchip,rk3066-spi��� ��%V(spiclkapb_pclk4&&9txrxZdefaulthefghi+ �disabledwatchdog@ff1e0000rockchip,px30-wdtsnps,dw-wdt���[ �% �disabledpwm@ff200000&rockchip,px30-pwmrockchip,rk3328-pwm�� �"S (pwmpclkZdefaulthjN �disabledpwm@ff200010&rockchip,px30-pwmrockchip,rk3328-pwm�� �"S (pwmpclkZdefaulthkN�okay!�pwm@ff200020&rockchip,px30-pwmrockchip,rk3328-pwm�� �"S (pwmpclkZdefaulthlN �disabledpwm@ff200030&rockchip,px30-pwmrockchip,rk3328-pwm�� 0�"S (pwmpclkZdefaulthmN �disabledpwm@ff208000&rockchip,px30-pwmrockchip,rk3328-pwm�� ��#T (pwmpclkZdefaulthnN �disabledpwm@ff208010&rockchip,px30-pwmrockchip,rk3328-pwm�� ��#T (pwmpclkZdefaulthoN �disabledpwm@ff208020&rockchip,px30-pwmrockchip,rk3328-pwm�� � �#T (pwmpclkZdefaulthpN �disabledpwm@ff208030&rockchip,px30-pwmrockchip,rk3328-pwm�� �0�#T (pwmpclkZdefaulthqN �disabledtimer@ff210000*rockchip,px30-timerrockchip,rk3288-timer��! ��Y& (pclktimerdma-controller@ff240000arm,pl330arm,primecell��$@�Y�� (apb_pclkp!&tsadc@ff280000rockchip,px30-tsadc��( �${,��P�,X(tsadcapb_pclk� �tsadc-apbr*���Zinitdefaultsleephr�s�r��okay��! saradc@ff288000,rockchip,px30-saradcrockchip,rk3399-saradc��(� �T�-W(saradcapb_pclk� �saradc-apb�okay%?!�nvmem@ff290000rockchip,px30-otp��)@�/Za(otpapb_pclkphy��phy+id@7�cpu-leakage@17�performance@1e�1clock-controller@ff2b0000rockchip,px30-cru��+ �t% (xin24mgpllr*68{����@I�F�q �� ���р�р�� ��!clock-controller@ff2bc000rockchip,px30-pmucru��+��t(xin24mr*6{%%% �G�������!%syscon@ff2c0000,rockchip,px30-usb2phy-grfsysconsimple-mfd��,+usb2phy@100rockchip,px30-usb2phy� �% (phyclk{Cu usb480m_phy�okay!uhost-portZ �D elinestate�okay!xotg-portZ$�BA@eotg-bvalidotg-idlinestate�okay!wphy@ff2e0000rockchip,px30-dsi-dphy��.�% E (refpclk>�apbZuv �okay!Bphy@ff2f0000rockchip,px30-csi-dphy��/@�F(pclkZuv /�apbr*�okay!�usb@ff3000000rockchip,px30-usbrockchip,rk3066-usbsnps,dwc2��0 �>�(otg�otg�����@ w "usb2-phyuv�okayusb@ff340000 generic-ehci��4 �<�x"usbuv�okayusb@ff350000 generic-ohci��5 �=�x"usbuv�okayethernet@ff360000rockchip,px30-gmac��6 �+emacirq@�>??@A�CL[(stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macclk_mac_speedr*�rmiiZdefaulthyzuv ^ �stmmaceth�okay�output�A �^ � �P�Pmmc@ff370000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc��7@ �6 ��;CD(biuciuciu-driveciu-sample!,�рZdefaulth{|}~uv�okay:L] o|����@mmc@ff380000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc��8@ �7 ��8EF(biuciuciu-driveciu-sample!,�рZdefault h���uv �okayL�����mmc@ff390000.rockchip,px30-dw-mshcrockchip,rk3288-dw-mshc��9@ �5 �9GH(biuciuciu-driveciu-sample!,�рZdefault h���uv �okay:�����A�?spi@ff3a0000 rockchip,sfc��:@ �8�:(clk_sfchclk_sfc h���Zdefaultuv  �disablednand-controller@ff3b0000rockchip,px30-nfc��;@ �9��7(ahbnfc{7��рZdefault h��������uv  �disabledopp-table-1operating-points-v2!�opp-200000000� ���~�opp-300000000�����opp-400000000�ׄ��opp-480000000��8�*�gpu@ff400000$rockchip,px30-maliarm,mali-bifrost��@@$�/.- ejobmmugpu�I�uv��okay��!video-codec@ff442000rockchip,px30-vpu��D �PO evepuvdpu��� (aclkhclk �uv iommu@ff442800rockchip,iommu��D( �Q��� (aclkiface uv !�dsi@ff450000(rockchip,px30-mipi-dsisnps,dw-mipi-dsi��E �K�D(pclkB"dphyuv =�apbr*+�okayports+port@0�+endpoint@0�<�!�endpoint@1�<�!�port@1�endpoint<�!�panel@0xinpeng,xpp055c272� � %? 2Wportendpoint<�!�vop@ff460000rockchip,px30-vop-big��F� �M����(aclk_vopdclk_vophclk_vop345 �axiahbdclk �uv �okayport+! endpoint@0�<�!�endpoint@1�<�!Ciommu@ff460f00rockchip,iommu��F �M��� (aclkifaceuv  �okay!�vop@ff470000rockchip,px30-vop-lit��G� �N����(aclk_vopdclk_vophclk_vop789 �axiahbdclk �uv �okayport+! endpoint@0�<�!�endpoint@1�<�!Diommu@ff470f00rockchip,iommu��G �N��� (aclkifaceuv  �okay!�isp@ff4a0000rockchip,px30-cif-isp��J�$�FIJ eispmimipi �3��_(ispaclkhclkpclk ��"dphyuv �okayports+port@0�+endpoint@0�C<�!_iommu@ff4a8000rockchip,iommu��J� �F��� (aclkifaceuv  = �okay!�qos@ff518000rockchip,px30-qossyscon��Q� !qos@ff520000rockchip,px30-qossyscon��R !#qos@ff52c000rockchip,px30-qossyscon��R� !qos@ff538000rockchip,px30-qossyscon��S� !qos@ff538080rockchip,px30-qossyscon��S�� !qos@ff538100rockchip,px30-qossyscon��S� !qos@ff538180rockchip,px30-qossyscon��S�� !qos@ff540000rockchip,px30-qossyscon��T !qos@ff540080rockchip,px30-qossyscon��T� !qos@ff548000rockchip,px30-qossyscon��T� !qos@ff548080rockchip,px30-qossyscon��T�� !qos@ff548100rockchip,px30-qossyscon��T� ! qos@ff548180rockchip,px30-qossyscon��T�� !!qos@ff548200rockchip,px30-qossyscon��T� !"qos@ff550000rockchip,px30-qossyscon��U !qos@ff550080rockchip,px30-qossyscon��U� !qos@ff550100rockchip,px30-qossyscon��U !qos@ff550180rockchip,px30-qossyscon��U� !qos@ff558000rockchip,px30-qossyscon��U� !qos@ff558080rockchip,px30-qossyscon��U�� !pinctrlrockchip,px30-pinctrlr* X�+ egpio@ff040000rockchip,gpio-bank�� ��% l |��!Rgpio@ff250000rockchip,gpio-bank��% ��\ l |��!�gpio@ff260000rockchip,gpio-bank��& ��] l |��!^gpio@ff270000rockchip,gpio-bank��' ��^ l |��pcfg-pull-up �!�pcfg-pull-down �!�pcfg-pull-none �!�pcfg-pull-none-2ma � �pcfg-pull-up-2ma � �pcfg-pull-up-4ma � �!�pcfg-pull-none-4ma � �pcfg-pull-down-4ma � �pcfg-pull-none-8ma � �!�pcfg-pull-up-8ma � �!�pcfg-pull-none-12ma � � !�pcfg-pull-up-12ma � � !�pcfg-pull-none-smt � �!�pcfg-output-high �pcfg-output-low �!�pcfg-input-high � �!�pcfg-input �i2c0i2c0-xfer �� �!Qi2c1i2c1-xfer ���!Vi2c2i2c2-xfer ���!Xi2c3i2c3-xfer � � �!`tsadctsadc-otp-pin ��!rtsadc-otp-out ��!suart0uart0-xfer � � �!'uart0-cts � �!(uart0-rts � �!)uart1uart1-xfer ���!Euart1-cts ��!Fuart1-rts ��uart2-m0uart2m0-xfer ���!Guart2-m1uart2m1-xfer � ��uart3-m0uart3m0-xfer ���uart3m0-cts ��uart3m0-rts ��uart3-m1uart3m1-xfer ���!Huart3m1-cts � �!Iuart3m1-rts � �!Juart4uart4-xfer ���!Kuart4-cts ��!Luart4-rts ��!Muart5uart5-xfer ���!Nuart5-cts ��!Ouart5-rts ��!Pspi0spi0-clk ��!aspi0-csn ��!bspi0-miso � �!cspi0-mosi � �!dspi0-clk-hs ��spi0-miso-hs � �spi0-mosi-hs � �spi1spi1-clk ��!espi1-csn0 � �!fspi1-csn1 � �!gspi1-miso ��!hspi1-mosi � �!ispi1-clk-hs ��spi1-miso-hs ��spi1-mosi-hs � �pdmpdm-clk0m0 ��pdm-clk0m1 ��pdm-clk1 ��pdm-sdi0m0 ��pdm-sdi0m1 ��pdm-sdi1 ��pdm-sdi2 ��pdm-sdi3 ��pdm-clk0m0-sleep ��pdm-clk0m1-sleep ��pdm-clk1-sleep ��pdm-sdi0m0-sleep ��pdm-sdi0m1-sleep ��pdm-sdi1-sleep ��pdm-sdi2-sleep ��pdm-sdi3-sleep ��i2s0i2s0-8ch-mclk ��i2s0-8ch-sclktx ��!+i2s0-8ch-sclkrx � �!,i2s0-8ch-lrcktx ��!-i2s0-8ch-lrckrx � �!.i2s0-8ch-sdo0 ��!/i2s0-8ch-sdo1 ��!1i2s0-8ch-sdo2 ��!3i2s0-8ch-sdo3 ��!5i2s0-8ch-sdi0 ��!0i2s0-8ch-sdi1 � �!2i2s0-8ch-sdi2 � �!4i2s0-8ch-sdi3 ��!6i2s1i2s1-2ch-mclk ��i2s1-2ch-sclk ��!7i2s1-2ch-lrck ��!8i2s1-2ch-sdi ��!9i2s1-2ch-sdo ��!:i2s2i2s2-2ch-mclk ��i2s2-2ch-sclk ��!;i2s2-2ch-lrck ��!<i2s2-2ch-sdi ��!=i2s2-2ch-sdo ��!>sdmmcsdmmc-clk ��!{sdmmc-cmd ��!|sdmmc-det ��!}sdmmc-bus1 ��sdmmc-bus4@ �����!~sdiosdio-clk ��!�sdio-cmd ��!�sdio-bus4@ �����!�emmcemmc-clk � �!�emmc-cmd � �!�emmc-rstnout � �emmc-bus1 ��emmc-bus4@ �����emmc-bus8� ���������!�emmc-reset � �!�flashflash-cs0 ��!�flash-rdy � �!�flash-dqs � �!�flash-ale � �!�flash-cle � �!�flash-wrn � �!�flash-csl ��flash-rdn ��!�flash-bus8� ���������!�sfcsfc-bus4@ �����!�sfc-bus2 ���sfc-cs0 ��!�sfc-clk � �!�lcdclcdc-rgb-dclk-pin ��lcdc-rgb-m0-hsync-pin ��lcdc-rgb-m0-vsync-pin ��lcdc-rgb-m0-den-pin ��lcdc-rgb888-m0-data-pins� ����� � � ���� � �������������lcdc-rgb666-m0-data-pins ����� � � ���� � �������lcdc-rgb565-m0-data-pins ����� � � ���� � �����lcdc-rgb888-m1-data-pins ��� � � �������������lcdc-rgb666-m1-data-pins� ��� � � �������lcdc-rgb565-m1-data-pins� ��� � � �����pwm0pwm0-pin ��!jpwm1pwm1-pin ��!kpwm2pwm2-pin � �!lpwm3pwm3-pin ��!mpwm4pwm4-pin ��!npwm5pwm5-pin ��!opwm6pwm6-pin ��!ppwm7pwm7-pin ��!qgmacrmii-pins� ��������� �!ymac-refclk-12ma � �!zmac-refclk � �cif-m0cif-clkout-m0 � �!\dvp-d2d9-m0� ���������� � � �dvp-d0d1-m0 � ��d10-d11-m0 ���cif-m1cif-clkout-m1 ��dvp-d2d9-m1� ����� � �������dvp-d0d1-m1 ���d10-d11-m1 ���ispisp-prelight ��headphonehp-det ��pmicpmic_int ��!Ssoc_slppin_gpio ��soc_slppin_slp ��soc_slppin_rst ��sdio-pwrseqwifi-enable-h ��!�mipimipi-pdn ��!]chosen serial5:115200n8adc-keys adc-keys � buttons 0w@ Jdbutton-esc Xesc ^ i�0button-home Xhome ^f i ��button-menu Xmenu ^� ixbutton-down Xvolume down ^r i��button-up Xvolume up ^s iBhbacklightpwm-backlight ��a� �W!�emmc-pwrseqmmc-pwrseq-emmch�Zdefault �� !�sdio-pwrseqmmc-pwrseq-simpleZdefaulth� �R!�vccsysregulator-fixed �vcc5v0_sys;O�LK@LK@!T compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3serial0serial1serial2serial3serial4serial5spi0spi1mmc0mmc1mmc2device_typeregenable-methodclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendinterruptsinterrupt-affinityportsstatusclock-frequencyclock-output-names#clock-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontribution#power-domain-cellspm_qospmuio1-supplypmuio2-supplyoffsetmode-bootloadermode-fastbootmode-loadermode-normalmode-recoveryclock-namesdmasdma-namesreg-shiftreg-io-widthpinctrl-namespinctrl-0rockchip,grfresetsreset-names#sound-dai-cells#interrupt-cellsinterrupt-controllervccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyphysphy-namesrockchip,outputremote-endpointrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspendgpiosvdd-supplymount-matrixirq-gpiosreset-gpiosVDDIO-supplyi2c-scl-falling-time-nsi2c-scl-rising-time-nsavdd-supplydvdd-supplydovdd-supplydata-lanes#pwm-cellsarm,pl330-periph-burst#dma-cellsassigned-clocksassigned-clock-ratesrockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplybits#reset-cellsassigned-clock-parents#phy-cellsinterrupt-namespower-domainsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modeclock_in_outphy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usbus-widthfifo-depthmax-frequencycap-mmc-highspeedcap-sd-highspeedcard-detect-delaysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplykeep-power-in-suspendnon-removablemmc-pwrseqmmc-hs200-1_8vmali-supplyiommus#iommu-cellsbacklightiovcc-supplyvci-supplyrockchip,disable-mmu-resetrockchip,pmurangesgpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmspower-supply