s 8l`(l(#geniatech,xpi-3128rockchip,rk3128 +7Geniatech XPI-3128aliases=/pinctrl/gpio@2007c000C/pinctrl/gpio@20080000I/pinctrl/gpio@20084000O/pinctrl/gpio@20088000U/i2c@20072000Z/i2c@20056000_/i2c@2005a000d/i2c@2005e000i/serial@20060000q/serial@20064000y/serial@20068000/ethernet@2008c000/mmc@1021c000/mmc@10214000arm-pmuarm,cortex-a7-pmu0LMNOcpus+rockchip,rk3036-smpcpu@f00cpuarm,cortex-a7@cpu@f01cpuarm,cortex-a7cpu@f02cpuarm,cortex-a7cpu@f03cpuarm,cortex-a7opp-table-0operating-points-v2#opp-216000000.  5~~7opp-408000000.Q 5~~7opp-600000000.#F 5~~7opp-696000000.)| 57opp-816000000.0, 5g8g87Copp-1008000000.< 5OO7opp-1200000000.G 5777display-subsystemrockchip,display-subsystemO Uokayopp-table-1operating-points-v2 opp-200000000.  5opp-300000000. 5opp-400000000.ׄ 500opp-480000000.8 5timerarm,armv7-timer0   \n6oscillator fixed-clockn6xin24m1sram@10080000 mmio-sram +  smp-sram@0rockchip,rk3066-smp-sramgpu@10090000"rockchip,rk3128-maliarm,mali-400 Hgpgpmmupp0ppmmu0pp1ppmmu1 buscore x Uokay syscon@100a0000&rockchip,rk3128-pmusysconsimple-mfd power-controller!rockchip,rk3128-power-controller+ power-domain@1Erz power-domain@2(power-domain@3video-codec@10106000(rockchip,rk3128-vpurockchip,rk3066-vpu` vepuvdpu (aclk_vdpuhclk_vdpuaclk_vepuhclk_vepu iommu@10106800rockchip,iommuh C aclkiface vop@1010e000rockchip,rk3126-vop aclk_vopdclk_vophclk_vopdef axiahbdclk Uokayport+ endpoint@0(6endpoint@1(dsi@10110000*rockchip,rk3128-mipi-dsisnps,dw-mipi-dsi@ !Epclk8=dphy apbG Udisabledports+port@0endpoint(port@1qos@1012d000rockchip,rk3128-qossyscon qos@1012e000rockchip,rk3128-qossyscon qos@1012f000rockchip,rk3128-qossyscon qos@1012f080rockchip,rk3128-qossyscon  qos@1012f100rockchip,rk3128-qossyscon qos@1012f180rockchip,rk3128-qossyscon qos@1012f200rockchip,rk3128-qossyscon interrupt-controller@10139000arm,cortex-a7-gic     Tiusb@101800002rockchip,rk3128-usbrockchip,rk3066-usbsnps,dwc2 otgzotg@ 8 =usb2-phyUokayusb@101c0000 generic-ehci 8=usbUokayusb@101e0000 generic-ohci 8=usb Udisabledi2s@10200000(rockchip,rk3128-i2srockchip,rk3066-i2s  DPi2s_clki2s_hclktxrx Udisabledspdif@10204000,rockchip,rk3128-spdifrockchip,rk3066-spdif @ 7S mclkhclk txdefault Udisabledspi@1020c000 rockchip,sfc  2clk_sfchclk_sfc Udisabledmmc@102140000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@@  Drvbiuciuciu-driveciu-sample rx-txрQresetUokay) default!"#$5@QXmmc@102180000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@  Eswbiuciuciu-driveciu-sample rx-txрRreset Udisabledmmc@1021c0000rockchip,rk3128-dw-mshcrockchip,rk3288-dw-mshc!@  Guybiuciuciu-driveciu-sample rx-txрSresetUokay)default %&'`rXi2s@10220000(rockchip,rk3128-i2srockchip,rk3066-i2s" Qi2s_clki2s_hclktxrxdefault( Udisablednand-controller@10500000(rockchip,rk3128-nfcrockchip,rk2928-nfcP@ Cahbnfcdefault )*+,-./0 Udisabledclock-controller@20000000rockchip,rk3128-cru 1xin24mG#gsyscon@20008000&rockchip,rk3128-grfsysconsimple-mfd +usb2phy@17crockchip,rk3128-usb2phy| phyclk usb480m_phy2Uokay2host-port 5 linestateUokayotg-port$#34otg-bvalidotg-idlinestateUokayhdmi@20034000rockchip,rk3128-inno-hdmi @@ -G pclkrefdefault 345 Uokayports+port@0endpoint(6port@1endpoint(7Rphy@20038000rockchip,rk3128-dsi-dphy @r refpclk $apb Udisabledtimer@20044000,rockchip,rk3128-timerrockchip,rk3288-timer @  aU pclktimertimer@20044020,rockchip,rk3128-timerrockchip,rk3288-timer @  aV pclktimertimer@20044040,rockchip,rk3128-timerrockchip,rk3288-timer @@  ;aW pclktimertimer@20044060,rockchip,rk3128-timerrockchip,rk3288-timer @`  <aX pclktimertimer@20044080,rockchip,rk3128-timerrockchip,rk3288-timer @  =aY pclktimertimer@200440a0,rockchip,rk3128-timerrockchip,rk3288-timer @  >aZ pclktimerwatchdog@2004c000 rockchip,rk3128-wdtsnps,dw-wdt  "? Udisabledpwm@20050000(rockchip,rk3128-pwmrockchip,rk3288-pwm ^default8 Udisabledpwm@20050010(rockchip,rk3128-pwmrockchip,rk3288-pwm ^default9Uokay^pwm@20050020(rockchip,rk3128-pwmrockchip,rk3288-pwm  ^default:Uokay_pwm@20050030(rockchip,rk3128-pwmrockchip,rk3288-pwm 0^default; Udisabledi2c@20056000(rockchip,rk3128-i2crockchip,rk3288-i2c ` i2cMdefault<+ Udisabledi2c@2005a000(rockchip,rk3128-i2crockchip,rk3288-i2c  i2cNdefault=+ Udisabledi2c@2005e000(rockchip,rk3128-i2crockchip,rk3288-i2c  i2cOdefault>+ Udisabledserial@20060000&rockchip,rk3128-uartsnps,dw-apb-uart  n6MUbaudclkapb_pclktxrxdefault ?@A  Udisabledserial@20064000&rockchip,rk3128-uartsnps,dw-apb-uart @ n6NVbaudclkapb_pclktxrxdefaultB Uokayserial@20068000&rockchip,rk3128-uartsnps,dw-apb-uart  n6OWbaudclkapb_pclktxrxdefaultC  Udisabledsaradc@2006c000rockchip,saradc  [>saradcapb_pclkW saradc-apbUokay(Qi2c@20072000(rockchip,rk3128-i2crockchip,rk3288-i2c   i2cLdefaultD+ Udisabledspi@20074000(rockchip,rk3128-spirockchip,rk3066-spi @ ARspiclkapb_pclk txrxdefaultEFGHI+ Udisableddma-controller@20078000arm,pl330arm,primecell @4O apb_pclkfethernet@2008c000rockchip,rk3128-gmac @89macirqeth_wake_irq8~oMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac8 stmmacethGqUokayoutputJrmiiK|defaultLmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22d  MdefaultNKpinctrlrockchip,rk3128-pinctrlG+gpio@2007c000rockchip,gpio-bank  $@Ti HEADER_5HEADER_3HEADER_22HEADER_23HEADER_19HEADER_26HEADER_21HEADER_24HEADER_18HEADER_36HEADER_13Wgpio@20080000rockchip,gpio-bank  %ATip HEADER_7HEADER_35HEADER_33HEADER_37HEADER_40HEADER_38HEADER_11HEADER_29HEADER_31[gpio@20084000rockchip,gpio-bank @ &BTi: HEADER_27HEADER_8HEADER_10Mgpio@20088000rockchip,gpio-bank  'CTi; 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