� ����8��(�ۤ ',Qualcomm Technologies, Inc. SM8250 MTP2qcom,sm8250-mtpqcom,sm8250aliases!=/soc@0/geniqup@9c0000/i2c@980000!B/soc@0/geniqup@9c0000/i2c@984000!G/soc@0/geniqup@9c0000/i2c@988000!L/soc@0/geniqup@9c0000/i2c@98c000!Q/soc@0/geniqup@9c0000/i2c@990000!V/soc@0/geniqup@9c0000/i2c@994000![/soc@0/geniqup@9c0000/i2c@998000!`/soc@0/geniqup@9c0000/i2c@99c000!e/soc@0/geniqup@ac0000/i2c@a80000!j/soc@0/geniqup@ac0000/i2c@a84000!o/soc@0/geniqup@ac0000/i2c@a88000!u/soc@0/geniqup@ac0000/i2c@a8c000!{/soc@0/geniqup@ac0000/i2c@a90000!�/soc@0/geniqup@ac0000/i2c@a94000!�/soc@0/geniqup@8c0000/i2c@880000!�/soc@0/geniqup@8c0000/i2c@884000!�/soc@0/geniqup@8c0000/i2c@888000!�/soc@0/geniqup@8c0000/i2c@88c000!�/soc@0/geniqup@8c0000/i2c@890000!�/soc@0/geniqup@8c0000/i2c@894000!�/soc@0/geniqup@9c0000/spi@980000!�/soc@0/geniqup@9c0000/spi@984000!�/soc@0/geniqup@9c0000/spi@988000!�/soc@0/geniqup@9c0000/spi@98c000!�/soc@0/geniqup@9c0000/spi@990000!�/soc@0/geniqup@9c0000/spi@994000!�/soc@0/geniqup@9c0000/spi@998000!�/soc@0/geniqup@9c0000/spi@99c000!�/soc@0/geniqup@ac0000/spi@a80000!�/soc@0/geniqup@ac0000/spi@a84000!�/soc@0/geniqup@ac0000/spi@a88000!�/soc@0/geniqup@ac0000/spi@a8c000!�/soc@0/geniqup@ac0000/spi@a90000!�/soc@0/geniqup@ac0000/spi@a94000!�/soc@0/geniqup@8c0000/spi@880000!�/soc@0/geniqup@8c0000/spi@884000!/soc@0/geniqup@8c0000/spi@888000!/soc@0/geniqup@8c0000/spi@88c000! /soc@0/geniqup@8c0000/spi@890000!/soc@0/geniqup@8c0000/spi@894000$/soc@0/geniqup@ac0000/serial@a90000chosen!serial0:115200n8clocksxo-board 2fixed-clock-:I� Jxo_board]asleep-clk 2fixed-clock:�-]cpus cpu@0ecpu 2qcom,kryo485qupsci���]kl2-cache2cache�]l3-cache2cache]cpu@100ecpu 2qcom,kryo485qupsci���]ll2-cache2cache�]cpu@200ecpu 2qcom,kryo485qupsci���]ml2-cache2cache�]cpu@300ecpu 2qcom,kryo485qupsci���]nl2-cache2cache�]cpu@400ecpu 2qcom,kryo485qupsci���]wl2-cache2cache�]cpu@500ecpu 2qcom,kryo485qupsci� ��]xl2-cache2cache�] cpu@600ecpu 2qcom,kryo485qupsci� ��]yl2-cache2cache�] cpu@700ecpu 2qcom,kryo485qupsci� ��]zl2-cache2cache�] firmwarescm 2qcom,scm�memory@80000000ememoryq�pmu2arm,armv8-pmuv3 �psci 2arm,psci-1.0|smcreserved-memory �memory@80000000q�`�memory@80700000q�p�memory@80860000 2qcom,cmd-dbq���memory@80900000q�� �] memory@80b00000q��0�memory@86200000q� P�memory@86700000q�p�memory@86800000q���memory@86810000q����memory@8681a000q��� �]Omemory@86900000q��P�memory@86e00000q��P�memory@87300000q�0P�memory@87800000q��@�]Xmemory@88c00000q��P�]Umemory@8a100000q���]_memory@8be00000q���memory@8bf00000q��`�qcom,smem 2qcom,smem� � smp2p-adsp 2qcom,smp2p���� $master-kernel4master-kernelD]`slave-kernel 4slave-kernel[p]^smp2p-cdsp 2qcom,smp2p�^�� $master-kernel4master-kernelD]Yslave-kernel 4slave-kernel[p]Wsmp2p-slpi 2qcom,smp2p���� $master-kernel4master-kernelD]Vslave-kernel 4slave-kernel[p]Ssoc@0 �� 2simple-busclock-controller@1000002qcom,gcc-sm8250q-���bi_tcxobi_tcxo_aosleep_clk�]mailbox@4080002qcom,sm8250-ipccqcom,ipccq@� ��[p�]qup-opp-table2operating-points-v2]opp-50000000�����opp-75000000�xh��opp-120000000�'�geniqup@8c00002qcom,geni-se-qupq�` �m-ahbs-ahb��� ��okayi2c@8800002qcom,geni-i2cq�@�se�w�default� �u  �disabledspi@8800002qcom,geni-spiq�@�se�w�default� �u � �disabledi2c@8840002qcom,geni-i2cq�@@�se�y�default� �G �okayspi@8840002qcom,geni-spiq�@@�se�y�default� �G � �disabledi2c@8880002qcom,geni-i2cq��@�se�{�default� �H  �disabledspi@8880002qcom,geni-spiq��@�se�{�default� �H � �disabledi2c@88c0002qcom,geni-i2cq��@�se�}�default� �I  �disabledspi@88c0002qcom,geni-spiq��@�se�}�default� �I � �disabledserial@88c0002qcom,geni-uartq��@�se�}�default� �I� �disabledi2c@8900002qcom,geni-i2cq�@�se��default�  �J  �disabledspi@8900002qcom,geni-spiq�@�se��default�! �J � �disabledserial@8900002qcom,geni-uartq�@�se��default�" �J� �disabledi2c@8940002qcom,geni-i2cq�@@�se���default�# �K  �disabledspi@8940002qcom,geni-spiq�@@�se���default�$ �K � �disabledgeniqup@9c00002qcom,geni-se-qupq�` �m-ahbs-ahb��� ��okayi2c@9800002qcom,geni-i2cq�@�se�W�default�% �Y  �disabledspi@9800002qcom,geni-spiq�@�se�W�default�& �Y � �disabledi2c@9840002qcom,geni-i2cq�@@�se�Y�default�' �Z �okay:B@spi@9840002qcom,geni-spiq�@@�se�Y�default�( �Z � �disabledi2c@9880002qcom,geni-i2cq��@�se�[�default�) �[  �disabledspi@9880002qcom,geni-spiq��@�se�[�default�* �[ � �disabledserial@9880002qcom,geni-debug-uartq��@�se�[�default�+ �[� �disabledi2c@98c0002qcom,geni-i2cq��@�se�]�default�, �\  �disabledspi@98c0002qcom,geni-spiq��@�se�]�default�- �\ � �disabledi2c@9900002qcom,geni-i2cq�@�se�_�default�. �]  �disabledspi@9900002qcom,geni-spiq�@�se�_�default�/ �] � �disabledi2c@9940002qcom,geni-i2cq�@@�se�a�default�0 �^  �disabledspi@9940002qcom,geni-spiq�@@�se�a�default�1 �^ � �disabledi2c@9980002qcom,geni-i2cq��@�se�c�default�2 �_  �disabledspi@9980002qcom,geni-spiq��@�se�c�default�3 �_ � �disabledserial@9980002qcom,geni-uartq��@�se�c�default�4 �_� �disabledi2c@99c0002qcom,geni-i2cq��@�se�e�default�5 �`  �disabledspi@99c0002qcom,geni-spiq��@�se�e�default�6 �` � �disabledgeniqup@ac00002qcom,geni-se-qupq�` �m-ahbs-ahb��� ��okayi2c@a800002qcom,geni-i2cq�@�se�i�default�7 �a  �disabledspi@a800002qcom,geni-spiq�@�se�i�default�8 �a � �disabledi2c@a840002qcom,geni-i2cq�@@�se�k�default�9 �b  �disabledspi@a840002qcom,geni-spiq�@@�se�k�default�: �b � �disabledi2c@a880002qcom,geni-i2cq��@�se�m�default�; �c  �disabledspi@a880002qcom,geni-spiq��@�se�m�default�< �c � �disabledi2c@a8c0002qcom,geni-i2cq��@�se�o�default�= �d  �disabledspi@a8c0002qcom,geni-spiq��@�se�o�default�> �d � �disabledi2c@a900002qcom,geni-i2cq�@�se�q�default�? �e  �disabledspi@a900002qcom,geni-spiq�@�se�q�default�@ �e � �disabledserial@a900002qcom,geni-debug-uartq�@�se�q�default�A �e��okayi2c@a940002qcom,geni-i2cq�@@�se�s�default�B �f �okayspi@a940002qcom,geni-spiq�@@�se�s�default�C �f � �disabledinterconnect@15000002qcom,sm8250-config-nocqP��)Dinterconnect@16200002qcom,sm8250-system-nocqb�)Dinterconnect@163d0002qcom,sm8250-mc-virtqc�)Dinterconnect@16e00002qcom,sm8250-aggre1-nocqn�)Dinterconnect@17000002qcom,sm8250-aggre2-nocqp0)Dinterconnect@17330002qcom,sm8250-compute-nocqs0��)Dinterconnect@17400002qcom,sm8250-mmss-nocqt��)Dufshc@1d84000+2qcom,sm8250-ufshcqcom,ufshcjedec,ufs-2.0q�@0 � 9E>ufsphyH�\!crst�n�core_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clk@�������@o<4`�<4`��okay}F� q��G� �`�H� q�]Iphy@1d870002qcom,sm8250-qmp-ufs-phyq�p� � �refref_aux��\Icufsphy�okay�J�`X�K J8lanes@1d87400Pq�t�v��|��x�z�]Einterconnect@1e000002qcom,sm8250-ipa-virtq�)Dhwlock@1f400002qcom,tcsr-mutexq�*] gpu@3d00000*2qcom,adreno-650.2qcom,adrenoamd,imageon8q�Ikgsl_3d0_reg_memory �, SLMZNzap-shader�Oopp-table2operating-points-v2]Mopp-670000000�'�c�c@opp-587000000�"���copp-525000000�J�@c�opp-490000000�4΀c�opp-441600000�RHc�opp-400000000�ׄc�opp-305000000�-�@c@gmu@3d6a000&2qcom,adreno-gmu-650.2qcom,adreno-gmu@q֠� ) IIgmursccgmu_pdcgmu_pdc_seq�01mhfigmu(�PPP%�ahbgmucxoaximemnoc�PP}cxgx SLQ]Nopp-table2operating-points-v2]Qopp-200000000� ��c0clock-controller@3d900002qcom,sm8250-gpuccq���"#8�bi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_src-��]Piommu@3da0000!2qcom,sm8250-smmu-500arm,mmu-500q���x������������P%&�ahbbusiface�P]Lremoteproc@5c000002qcom,sm8250-slpi-pasq�@<�R SSSS#mwdogfatalreadyhandoverstop-ack��xo�T}load_statelcxlmx�U�V�stop�okay�qcom/sm8250/slpi.mbnglink-edge� �lpass$remoteproc@83000002qcom,sm8250-cdsp-pasq0@�BWWWW#mwdogfatalreadyhandoverstop-ack��xo�T}load_statecx�X�Y�stop�okay�qcom/sm8250/cdsp.mbnglink-edge� �lpass$interconnect@90c00002qcom,sm8250-dc-nocq B)Dinterconnect@91000002qcom,sm8250-gem-nocq  @)Dinterconnect@99900002qcom,sm8250-npu-nocq �)Dinterrupt-controller@b2200002qcom,sm8250-pdcqcom,pdc q "��`0��^^a}?~� p[]Rthermal-sensor@c263000 2qcom,sm8250-tsensqcom,tsens-v2 q &0� " �����muplowcritical ]ithermal-sensor@c265000 2qcom,sm8250-tsensqcom,tsens-v2 q &P� "0�� ���muplowcritical ]�qmp@c3000002qcom,sm8250-aoss-qmpq 0� -�]Tspmi@c4400002qcom,spmi-pmic-arbPq D ``p @�`Icorechnlsobsrvrintrcnfg mperiph_irq �R' [ppmic@02qcom,pm8150qcom,spmi-pmicq power-on@8002qcom,pm8998-ponqpwrkey2qcom,pm8941-pwrkey�4= =Jt �disabledtemp-alarm@24002qcom,spmi-temp-alarmq$�$UZathermal ]�adc@31002qcom,spmi-adc5q1 r�1]Zref-gnd@0q��ref_gndvref-1p25@1q� �vref_1p25die-temp@6q� �die_temprtc@60002qcom,pm8941-rtcq` Irtcalarm�a �disabledgpio@c0002qcom,pm8150-gpioq���[ppmic@12qcom,pm8150qcom,spmi-pmicq pmic@22qcom,pm8150bqcom,spmi-pmicq power-on@8002qcom,pm8916-ponq �disabledtemp-alarm@24002qcom,spmi-temp-alarmq$�$U[athermal ]�adc@31002qcom,spmi-adc5q1 r�1][ref-gnd@0q��ref_gndvref-1p25@1q� �vref_1p25die-temp@6q� �die_tempchg-temp@9q � �chg_tempgpio@c0002qcom,pm8150b-gpioq���[ppmic@32qcom,pm8150bqcom,spmi-pmicq pmic@42qcom,pm8150lqcom,spmi-pmicq power-on@8002qcom,pm8916-ponq �disabledtemp-alarm@24002qcom,spmi-temp-alarmq$�$U\athermal ]�adc@31002qcom,spmi-adc5q1 r�1]\ref-gnd@0q��ref_gndvref-1p25@1q� �vref_1p25die-temp@6q� �die_tempgpio@c0002qcom,pm8150l-gpioq���[ppmic@52qcom,pm8150lqcom,spmi-pmicq pmic@a2qcom,pm8009qcom,spmi-pmicq  pon@8002qcom,pm8916-ponqgpio@c0002qcom,pm8005-gpioq���[ppmic@b2qcom,pm8009qcom,spmi-pmicq  pinctrl@f1000002qcom,sm8250-pinctrl0q0P0�0Iwestsouthnorth ����[p�]��R�(]]qup-i2c0-default]%mux�gpio28gpio29�qup0config�gpio28gpio29��qup-i2c1-default]'pinmux �gpio4gpio5�qup1config �gpio4gpio5��qup-i2c2-default])mux�gpio115gpio116�qup2config�gpio115gpio116��qup-i2c3-default],mux�gpio119gpio120�qup3config�gpio119gpio120��qup-i2c4-default].mux �gpio8gpio9�qup4config �gpio8gpio9��qup-i2c5-default]0mux�gpio12gpio13�qup5config�gpio12gpio13��qup-i2c6-default]2mux�gpio16gpio17�qup6config�gpio16gpio17��qup-i2c7-default]5mux�gpio20gpio21�qup7config�gpio20gpio21��qup-i2c8-default]7mux�gpio24gpio25�qup8config�gpio24gpio25��qup-i2c9-default]9mux�gpio125gpio126�qup9config�gpio125gpio126��qup-i2c10-default];mux�gpio129gpio130�qup10config�gpio129gpio130��qup-i2c11-default]=mux�gpio60gpio61�qup11config�gpio60gpio61��qup-i2c12-default]?mux�gpio32gpio33�qup12config�gpio32gpio33��qup-i2c13-default]Bmux�gpio36gpio37�qup13config�gpio36gpio37��qup-i2c14-default]mux�gpio40gpio41�qup14config�gpio40gpio41��qup-i2c15-default]mux�gpio44gpio45�qup15config�gpio44gpio45��qup-i2c16-default]mux�gpio48gpio49�qup16config�gpio48gpio49��qup-i2c17-default]mux�gpio52gpio53�qup17config�gpio52gpio53��qup-i2c18-default] mux�gpio56gpio57�qup18config�gpio56gpio57��qup-i2c19-default]#mux �gpio0gpio1�qup19config �gpio0gpio1��qup-spi0-default]&mux�gpio28gpio29gpio30gpio31�qup0config�gpio28gpio29gpio30gpio31��qup-spi1-default](mux�gpio4gpio5gpio6gpio7�qup1config�gpio4gpio5gpio6gpio7��qup-spi2-default]*mux �gpio115gpio116gpio117gpio118�qup2config �gpio115gpio116gpio117gpio118��qup-spi3-default]-mux �gpio119gpio120gpio121gpio122�qup3config �gpio119gpio120gpio121gpio122��qup-spi4-default]/mux�gpio8gpio9gpio10gpio11�qup4config�gpio8gpio9gpio10gpio11��qup-spi5-default]1mux�gpio12gpio13gpio14gpio15�qup5config�gpio12gpio13gpio14gpio15��qup-spi6-default]3mux�gpio16gpio17gpio18gpio19�qup6config�gpio16gpio17gpio18gpio19��qup-spi7-default]6mux�gpio20gpio21gpio22gpio23�qup7config�gpio20gpio21gpio22gpio23��qup-spi8-default]8mux�gpio24gpio25gpio26gpio27�qup8config�gpio24gpio25gpio26gpio27��qup-spi9-default]:mux �gpio125gpio126gpio127gpio128�qup9config �gpio125gpio126gpio127gpio128��qup-spi10-default]<mux �gpio129gpio130gpio131gpio132�qup10config �gpio129gpio130gpio131gpio132��qup-spi11-default]>mux�gpio60gpio61gpio62gpio63�qup11config�gpio60gpio61gpio62gpio63��qup-spi12-default]@mux�gpio32gpio33gpio34gpio35�qup12config�gpio32gpio33gpio34gpio35��qup-spi13-default]Cmux�gpio36gpio37gpio38gpio39�qup13config�gpio36gpio37gpio38gpio39��qup-spi14-default]mux�gpio40gpio41gpio42gpio43�qup14config�gpio40gpio41gpio42gpio43��qup-spi15-default]mux�gpio44gpio45gpio46gpio47�qup15config�gpio44gpio45gpio46gpio47��qup-spi16-default]mux�gpio48gpio49gpio50gpio51�qup16config�gpio48gpio49gpio50gpio51��qup-spi17-default]mux�gpio52gpio53gpio54gpio55�qup17config�gpio52gpio53gpio54gpio55��qup-spi18-default]!mux�gpio56gpio57gpio58gpio59�qup18config�gpio56gpio57gpio58gpio59��qup-spi19-default]$mux�gpio0gpio1gpio2gpio3�qup19config�gpio0gpio1gpio2gpio3��qup-uart2-default]+mux�gpio117gpio118�qup2qup-uart6-default]4mux�gpio16gpio17gpio18gpio19�qup6qup-uart12-default]Amux�gpio34gpio35�qup12qup-uart17-default]mux�gpio52gpio53gpio54gpio55�qup17qup-uart18-default]"mux�gpio58gpio59�qup18remoteproc@173000002qcom,sm8250-adsp-pasq0<�R^^^^#mwdogfatalreadyhandoverstop-ack��xo�T}load_statelcxlmx�_�`�stop�okay�qcom/sm8250/adsp.mbnglink-edge� �lpass$interrupt-controller@17a00000 2arm,gic-v3p[ q�� � ]watchdog@17c10000#2qcom,apss-wdt-sm8250qcom,kpss-wdtq��timer@17c20000 �2arm,armv7-timer-memq�:$�frame@17c21000 � q�� frame@17c23000  � q�0 �disabledframe@17c25000  � q�P �disabledframe@17c27000  � q�p �disabledframe@17c29000  � q �disabledframe@17c2b000  � q° �disabledframe@17c2d000  �q�� �disabledrsc@18200000 �apps_rsc2qcom,rpmh-rsc0q !"Idrv-0drv-1drv-2$� ' 3clock-controller2qcom,sm8250-rpmh-clk-�xo�a]power-controller2qcom,sm8250-rpmhpd�b]opp-table2operating-points-v2]bopp1copp2c0]opp3c@]opp4c�]opp5c�opp6copp7c@opp8cPopp9c�opp10c�bcm_voter2qcom,bcm-voter]Dpm8150-rpmh-regulators2qcom,pm8150-rpmh-regulatorsCaPc^clczc�c�c�c�c�c�c�d�efg-hGesmps5 ^vreg_s5a_1p9m �����]hsmps6^vreg_s6a_0p95m ��6@�]fldo2 ^vreg_l2a_3p1m.��.��ldo3 ^vreg_l3a_0p9m)�8��ldo5^vreg_l5a_0p875m m�� m��]Jldo6 ^vreg_l6a_1p2mO��O��]Gldo7 ^vreg_l7a_1p7m@�w@�ldo9 ^vreg_l9a_1p2mO��O��]Kldo10^vreg_l10a_1p8mw@�w@�ldo12^vreg_l12a_1p8mw@�w@�ldo13^vreg_l13a_ts_3p0m-��-��ldo14^vreg_l14a_1p8mw@����ldo15^vreg_l15a_11ad_io_1p8mw@�w@�ldo16^vreg_l16a_2p7m)B��-*��ldo17^vreg_l17a_3p0m+�@�-��]Fpm8150l-rpmh-regulators2qcom,pm8150l-rpmh-regulatorsCcPc^clczc�c�c�c�c�H�g�e�e�ecbob ^vreg_bobm-��= �]esmps8 ^vreg_s8c_1p3m�@��@�]gldo1 ^vreg_l1c_1p8mw@�w@�ldo2 ^vreg_l2c_1p2mO��O��ldo3^vreg_l3c_0p92m �� ��ldo4 ^vreg_l4c_1p7m@�,���ldo5 ^vreg_l5c_1p8mw@�,���ldo6 ^vreg_l6c_2p9mw@�-*��ldo7^vreg_l7c_cam_vcm0_2p85m+�@�/]�ldo8 ^vreg_l8c_1p8mw@�w@�ldo9 ^vreg_l9c_2p9m)B��-*��ldo10^vreg_l10c_3p0m-���-���ldo11^vreg_l11c_3p3m-���2���pm8009-rpmh-regulators2qcom,pm8009-rpmh-regulatorsCfPc^eg+e<Hldo1^vreg_l1f_cam_dvdd1_1p1m؀�؀�ldo2^vreg_l2f_cam_dvdd0_1p2mO��O��ldo3^vreg_l3f_cam_dvdd2_1p05m��ldo5^vreg_l5f_cam_avdd0_2p85m*���*���ldo6^vreg_l6f_cam_avdd1_2p85m+�@�+�@�ldo7 ^vreg_l7f_1p8mw@�w@�interconnect@185900002qcom,sm8250-epss-l3qY� �xoalternatecpufreq@18591000+2qcom,sm8250-cpufreq-epssqcom,cpufreq-epss0qYY Y0'Ifreq-domain0freq-domain1freq-domain2� �xoalternateJ]timer2arm,armv8-timer0� �� � �thermal-zonescpu0-thermal]�s��itripstrip-point0�_���lpassive]jtrip-point1�s��lpassive]ocpu_crit����� lcriticalcooling-mapsmap0�j0�k��������l��������m��������n��������map1�o0�k��������l��������m��������n��������cpu1-thermal]�s��itripstrip-point0�_���lpassive]ptrip-point1�s��lpassive]qcpu_crit����� lcriticalcooling-mapsmap0�p0�k��������l��������m��������n��������map1�q0�k��������l��������m��������n��������cpu2-thermal]�s��itripstrip-point0�_���lpassive]rtrip-point1�s��lpassive]scpu_crit����� lcriticalcooling-mapsmap0�r0�k��������l��������m��������n��������map1�s0�k��������l��������m��������n��������cpu3-thermal]�s��itripstrip-point0�_���lpassive]ttrip-point1�s��lpassive]ucpu_crit����� lcriticalcooling-mapsmap0�t0�k��������l��������m��������n��������map1�u0�k��������l��������m��������n��������cpu4-top-thermal]�s��itripstrip-point0�_���lpassive]vtrip-point1�s��lpassive]{cpu_crit����� lcriticalcooling-mapsmap0�v0�w��������x��������y��������z��������map1�{0�w��������x��������y��������z��������cpu5-top-thermal]�s��itripstrip-point0�_���lpassive]|trip-point1�s��lpassive]}cpu_crit����� lcriticalcooling-mapsmap0�|0�w��������x��������y��������z��������map1�}0�w��������x��������y��������z��������cpu6-top-thermal]�s��i tripstrip-point0�_���lpassive]~trip-point1�s��lpassive]cpu_crit����� lcriticalcooling-mapsmap0�~0�w��������x��������y��������z��������map1�0�w��������x��������y��������z��������cpu7-top-thermal]�s��i tripstrip-point0�_���lpassive]�trip-point1�s��lpassive]�cpu_crit����� lcriticalcooling-mapsmap0��0�w��������x��������y��������z��������map1��0�w��������x��������y��������z��������cpu4-bottom-thermal]�s��i tripstrip-point0�_���lpassive]�trip-point1�s��lpassive]�cpu_crit����� lcriticalcooling-mapsmap0��0�w��������x��������y��������z��������map1��0�w��������x��������y��������z��������cpu5-bottom-thermal]�s��i tripstrip-point0�_���lpassive]�trip-point1�s��lpassive]�cpu_crit����� lcriticalcooling-mapsmap0��0�w��������x��������y��������z��������map1��0�w��������x��������y��������z��������cpu6-bottom-thermal]�s��i tripstrip-point0�_���lpassive]�trip-point1�s��lpassive]�cpu_crit����� lcriticalcooling-mapsmap0��0�w��������x��������y��������z��������map1��0�w��������x��������y��������z��������cpu7-bottom-thermal]�s��itripstrip-point0�_���lpassive]�trip-point1�s��lpassive]�cpu_crit����� lcriticalcooling-mapsmap0��0�w��������x��������y��������z��������map1��0�w��������x��������y��������z��������aoss0-thermal]�s��itripstrip-point0�_���lhotcluster0-thermal]�s��itripstrip-point0�_���lhotcluster0_crit����� lcriticalcluster1-thermal]�s��itripstrip-point0�_���lhotcluster1_crit����� lcriticalgpu-thermal-top]�s��itripstrip-point0�_���lhotaoss1-thermal]�s���tripstrip-point0�_���lhotwlan-thermal]�s���tripstrip-point0�_���lhotvideo-thermal]�s���tripstrip-point0�_���lhotmem-thermal]�s���tripstrip-point0�_���lhotq6-hvx-thermal]�s���tripstrip-point0�_���lhotcamera-thermal]�s���tripstrip-point0�_���lhotcompute-thermal]�s���tripstrip-point0�_���lhotnpu-thermal]�s���tripstrip-point0�_���lhotgpu-thermal-bottom]�s���tripstrip-point0�_���lhotpm8150]ds��tripstrip0�s�lpassivetrip1��8�lhottrip2�6h� lcriticalpm8150b]ds��tripstrip0�s�lpassivetrip1��8�lhottrip2�6h� lcriticalpm8150l]ds��tripstrip0�s�lpassivetrip1��8�lhottrip2�6h� lcriticalvph-pwr-regulator2regulator-fixed^vph_pwrm8u �8u ]cpm8150-s42regulator-fixed ^vreg_s4a_1p8mw@�w@���c]Hsmpc6-regulator2regulator-fixed^vreg_s6c_0p88m m�� m���c]d interrupt-parent#address-cells#size-cellsmodelcompatiblei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11i2c12i2c13i2c14i2c15i2c16i2c17i2c18i2c19spi0spi1spi2spi3spi4spi5spi6spi7spi8spi9spi10spi11spi12spi13spi14spi15spi16spi17spi18spi19serial0stdout-path#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregenable-methodnext-level-cacheqcom,freq-domain#cooling-cells#reset-cellsinterruptsrangesno-mapmemory-regionhwlocksqcom,smeminterrupts-extendedmboxesqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#power-domain-cellsclock-namesclocks#mbox-cellsopp-hzrequired-oppsstatuspinctrl-namespinctrl-0power-domainsoperating-points-v2#interconnect-cellsqcom,bcm-votersphysphy-nameslanes-per-directionresetsreset-namesfreq-table-hzvcc-supplyvcc-max-microampvccq-supplyvccq-max-microampvccq2-supplyvccq2-max-microampvdda-phy-supplyvdda-max-microampvdda-pll-supplyvdda-pll-max-microamp#phy-cells#hwlock-cells#stream-id-cellsreg-namesiommusqcom,gmuopp-levelinterrupt-namespower-domain-names#iommu-cells#global-interruptsqcom,smem-statesqcom,smem-state-namesfirmware-namelabelqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,eeqcom,channeldebouncebias-pull-uplinux,codeio-channelsio-channel-names#io-channel-cellsqcom,pre-scalinggpio-controller#gpio-cellsgpio-rangeswakeup-parentgpio-reserved-rangespinsfunctiondrive-strengthbias-disableframe-numberqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-l1-l8-l11-supplyvdd-l2-l10-supplyvdd-l3-l4-l5-l18-supplyvdd-l6-l9-supplyvdd-l7-l12-l14-l15-supplyvdd-l13-l16-l17-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-initial-modevdd-l1-l8-supplyvdd-l2-l3-supplyvdd-l4-l5-l6-supplyvdd-l7-l11-supplyvdd-l9-l10-supplyvdd-bob-supplyvdd-l2-supplyvdd-l5-l6-supplyvdd-l7-supply#freq-domain-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceregulator-always-onregulator-boot-onvin-supply