8 ( timll,omap3-devkit8000ti,omap3 +7TimLL OMAP3 Devkit8000chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/connector0 m/connector1cpus+cpu@0arm,cortex-a8vcpucpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ 'pinmux_twl4030_pinsDAXpinmux_dss_dpi_pinsDXscm_conf@270sysconsimple-busp0+ p0Xpbias_regulator@2b0ti,pbias-omap3ti,pbias-omap`pbias_mmc_omap2430gpbias_mmc_omap2430vw@-Xclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhXmcbsp5_fckti,composite-clockXmcbsp1_mux_fck@4ti,composite-mux-clockX mcbsp1_fckti,composite-clock Xmcbsp2_mux_fck@4ti,composite-mux-clock X mcbsp2_fckti,composite-clock Xmcbsp3_mux_fck@68ti,composite-mux-clock hXmcbsp3_fckti,composite-clock Xmcbsp4_mux_fck@68ti,composite-mux-clock hXmcbsp4_fckti,composite-clockXclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ 'pinmux_twl4030_vpins DXaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYXosc_sys_ck@d40 ti,mux-clock @Xsys_ck@1270ti,divider-clockpXsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock dpll3_m2x2_ckfixed-factor-clock Xdpll4_x2_ckfixed-factor-clock corex2_fckfixed-factor-clock Xwkup_l4_ickfixed-factor-clock XMcorex2_d3_fckfixed-factor-clock Xcorex2_d5_fckfixed-factor-clock Xclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockX?virt_12m_ck fixed-clockXvirt_13m_ck fixed-clock]@Xvirt_19200000_ck fixed-clock$Xvirt_26000000_ck fixed-clockXvirt_38_4m_ck fixed-clockIXdpll4_ck@d00ti,omap3-dpll-per-clock D 0Xdpll4_m2_ck@d48ti,divider-clock? HXdpll4_m2x2_mul_ckfixed-factor-clock X dpll4_m2x2_ck@d00ti,gate-clock  X!omap_96m_alwon_fckfixed-factor-clock! X(dpll3_ck@d00ti,omap3-dpll-core-clock @ 0Xdpll3_m3_ck@1140ti,divider-clock@X"dpll3_m3x2_mul_ckfixed-factor-clock" X#dpll3_m3x2_ck@d00ti,gate-clock#  X$emu_core_alwon_ckfixed-factor-clock$ Xasys_altclk fixed-clockX-mcbsp_clks fixed-clockXdpll3_m2_ck@d40ti,divider-clock @Xcore_ckfixed-factor-clock X%dpll1_fck@940ti,divider-clock% @X&dpll1_ck@904ti,omap3-dpll-clock&  $ @ 4Xdpll1_x2_ckfixed-factor-clock X'dpll1_x2m2_ck@944ti,divider-clock' DX;cm_96m_fckfixed-factor-clock( X)omap_96m_fck@d40 ti,mux-clock) @XDdpll4_m3_ck@e40ti,divider-clock @X*dpll4_m3x2_mul_ckfixed-factor-clock* X+dpll4_m3x2_ck@d00ti,gate-clock+ X,omap_54m_fck@d40 ti,mux-clock,- @X7cm_96m_d2_fckfixed-factor-clock) X.omap_48m_fck@d40 ti,mux-clock.- @X/omap_12m_fckfixed-factor-clock/ XFdpll4_m4_ck@e40ti,divider-clock @X0dpll4_m4x2_mul_ckti,fixed-factor-clock0,:GX1dpll4_m4x2_ck@d00ti,gate-clock1 GXdpll4_m5_ck@f40ti,divider-clock?@X2dpll4_m5x2_mul_ckti,fixed-factor-clock2,:GX3dpll4_m5x2_ck@d00ti,gate-clock3 GXidpll4_m6_ck@1140ti,divider-clock?@X4dpll4_m6x2_mul_ckfixed-factor-clock4 X5dpll4_m6x2_ck@d00ti,gate-clock5 X6emu_per_alwon_ckfixed-factor-clock6 Xbclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock% pX8clkout2_src_mux_ck@d70ti,composite-mux-clock%)7 pX9clkout2_src_ckti,composite-clock89X:sys_clkout2@d70ti,divider-clock:@ pZmpu_ckfixed-factor-clock; X<arm_fck@924ti,divider-clock< $emu_mpu_alwon_ckfixed-factor-clock< Xcl3_ick@a40ti,divider-clock% @X=l4_ick@a40ti,divider-clock= @X>rm_ick@c40ti,divider-clock> @gpt10_gate_fck@a00ti,composite-gate-clock  X@gpt10_mux_fck@a40ti,composite-mux-clock? @XAgpt10_fckti,composite-clock@Agpt11_gate_fck@a00ti,composite-gate-clock  XBgpt11_mux_fck@a40ti,composite-mux-clock? @XCgpt11_fckti,composite-clockBCcore_96m_fckfixed-factor-clockD Xmmchs2_fck@a00ti,wait-gate-clock Xmmchs1_fck@a00ti,wait-gate-clock Xi2c3_fck@a00ti,wait-gate-clock Xi2c2_fck@a00ti,wait-gate-clock Xi2c1_fck@a00ti,wait-gate-clock Xmcbsp5_gate_fck@a00ti,composite-gate-clock  Xmcbsp1_gate_fck@a00ti,composite-gate-clock  Xcore_48m_fckfixed-factor-clock/ XEmcspi4_fck@a00ti,wait-gate-clockE Xmcspi3_fck@a00ti,wait-gate-clockE Xmcspi2_fck@a00ti,wait-gate-clockE Xmcspi1_fck@a00ti,wait-gate-clockE Xuart2_fck@a00ti,wait-gate-clockE Xuart1_fck@a00ti,wait-gate-clockE  Xcore_12m_fckfixed-factor-clockF XGhdq_fck@a00ti,wait-gate-clockG Xcore_l3_ickfixed-factor-clock= XHsdrc_ick@a10ti,wait-gate-clockH Xgpmc_fckfixed-factor-clockH core_l4_ickfixed-factor-clock> XImmchs2_ick@a10ti,omap3-interface-clockI Xmmchs1_ick@a10ti,omap3-interface-clockI Xhdq_ick@a10ti,omap3-interface-clockI Xmcspi4_ick@a10ti,omap3-interface-clockI Xmcspi3_ick@a10ti,omap3-interface-clockI Xmcspi2_ick@a10ti,omap3-interface-clockI Xmcspi1_ick@a10ti,omap3-interface-clockI Xi2c3_ick@a10ti,omap3-interface-clockI Xi2c2_ick@a10ti,omap3-interface-clockI Xi2c1_ick@a10ti,omap3-interface-clockI Xuart2_ick@a10ti,omap3-interface-clockI Xuart1_ick@a10ti,omap3-interface-clockI  Xgpt11_ick@a10ti,omap3-interface-clockI  Xgpt10_ick@a10ti,omap3-interface-clockI  Xmcbsp5_ick@a10ti,omap3-interface-clockI  Xmcbsp1_ick@a10ti,omap3-interface-clockI  Xomapctrl_ick@a10ti,omap3-interface-clockI Xdss_tv_fck@e00ti,gate-clock7Xdss_96m_fck@e00ti,gate-clockDXdss2_alwon_fck@e00ti,gate-clockXdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock XJgpt1_mux_fck@c40ti,composite-mux-clock? @XKgpt1_fckti,composite-clockJKaes2_ick@a10ti,omap3-interface-clockI Xwkup_32k_fckfixed-factor-clock? XLgpio1_dbck@c00ti,gate-clockL Xsha12_ick@a10ti,omap3-interface-clockI Xwdt2_fck@c00ti,wait-gate-clockL Xwdt2_ick@c10ti,omap3-interface-clockM Xwdt1_ick@c10ti,omap3-interface-clockM Xgpio1_ick@c10ti,omap3-interface-clockM Xomap_32ksync_ick@c10ti,omap3-interface-clockM Xgpt12_ick@c10ti,omap3-interface-clockM Xgpt1_ick@c10ti,omap3-interface-clockM Xper_96m_fckfixed-factor-clock( X per_48m_fckfixed-factor-clock/ XNuart3_fck@1000ti,wait-gate-clockN Xgpt2_gate_fck@1000ti,composite-gate-clockXOgpt2_mux_fck@1040ti,composite-mux-clock?@XPgpt2_fckti,composite-clockOPgpt3_gate_fck@1000ti,composite-gate-clockXQgpt3_mux_fck@1040ti,composite-mux-clock?@XRgpt3_fckti,composite-clockQRgpt4_gate_fck@1000ti,composite-gate-clockXSgpt4_mux_fck@1040ti,composite-mux-clock?@XTgpt4_fckti,composite-clockSTgpt5_gate_fck@1000ti,composite-gate-clockXUgpt5_mux_fck@1040ti,composite-mux-clock?@XVgpt5_fckti,composite-clockUVgpt6_gate_fck@1000ti,composite-gate-clockXWgpt6_mux_fck@1040ti,composite-mux-clock?@XXgpt6_fckti,composite-clockWXgpt7_gate_fck@1000ti,composite-gate-clockXYgpt7_mux_fck@1040ti,composite-mux-clock?@XZgpt7_fckti,composite-clockYZgpt8_gate_fck@1000ti,composite-gate-clock X[gpt8_mux_fck@1040ti,composite-mux-clock?@X\gpt8_fckti,composite-clock[\gpt9_gate_fck@1000ti,composite-gate-clock X]gpt9_mux_fck@1040ti,composite-mux-clock?@X^gpt9_fckti,composite-clock]^per_32k_alwon_fckfixed-factor-clock? X_gpio6_dbck@1000ti,gate-clock_Xgpio5_dbck@1000ti,gate-clock_Xgpio4_dbck@1000ti,gate-clock_Xgpio3_dbck@1000ti,gate-clock_Xgpio2_dbck@1000ti,gate-clock_ Xwdt3_fck@1000ti,wait-gate-clock_ Xper_l4_ickfixed-factor-clock> X`gpio6_ick@1010ti,omap3-interface-clock`Xgpio5_ick@1010ti,omap3-interface-clock`Xgpio4_ick@1010ti,omap3-interface-clock`Xgpio3_ick@1010ti,omap3-interface-clock`Xgpio2_ick@1010ti,omap3-interface-clock` Xwdt3_ick@1010ti,omap3-interface-clock` Xuart3_ick@1010ti,omap3-interface-clock` Xuart4_ick@1010ti,omap3-interface-clock`Xgpt9_ick@1010ti,omap3-interface-clock` Xgpt8_ick@1010ti,omap3-interface-clock` Xgpt7_ick@1010ti,omap3-interface-clock`Xgpt6_ick@1010ti,omap3-interface-clock`Xgpt5_ick@1010ti,omap3-interface-clock`Xgpt4_ick@1010ti,omap3-interface-clock`Xgpt3_ick@1010ti,omap3-interface-clock`Xgpt2_ick@1010ti,omap3-interface-clock`Xmcbsp2_ick@1010ti,omap3-interface-clock`Xmcbsp3_ick@1010ti,omap3-interface-clock`Xmcbsp4_ick@1010ti,omap3-interface-clock`Xmcbsp2_gate_fck@1000ti,composite-gate-clockX mcbsp3_gate_fck@1000ti,composite-gate-clockX mcbsp4_gate_fck@1000ti,composite-gate-clockXemu_src_mux_ck@1140 ti,mux-clockabc@Xdemu_src_ckti,clkdm-gate-clockdXepclk_fck@1140ti,divider-clocke@pclkx2_fck@1140ti,divider-clocke@atclk_fck@1140ti,divider-clocke@traceclk_src_fck@1140 ti,mux-clockabc@Xftraceclk_fck@1140ti,divider-clockf @secure_32k_fck fixed-clockXggpt12_fckfixed-factor-clockg wdt1_fckfixed-factor-clockg security_l4_ick2fixed-factor-clock> Xhaes1_ick@a14ti,omap3-interface-clockh rng_ick@a14ti,omap3-interface-clockh sha11_ick@a14ti,omap3-interface-clockh des1_ick@a14ti,omap3-interface-clockh cam_mclk@f00ti,gate-clockiGcam_ick@f10!ti,omap3-no-wait-interface-clock>Xcsi2_96m_fck@f00ti,gate-clockXsecurity_l3_ickfixed-factor-clock= Xjpka_ick@a14ti,omap3-interface-clockj icr_ick@a10ti,omap3-interface-clockI des2_ick@a10ti,omap3-interface-clockI mspro_ick@a10ti,omap3-interface-clockI mailboxes_ick@a10ti,omap3-interface-clockI ssi_l4_ickfixed-factor-clock> Xqsr1_fck@c00ti,wait-gate-clock Xsr2_fck@c00ti,wait-gate-clock Xsr_l4_ickfixed-factor-clock> dpll2_fck@40ti,divider-clock%@Xkdpll2_ck@4ti,omap3-dpll-clockk$@4pXldpll2_m2_ck@44ti,divider-clocklDXmiva2_ck@0ti,wait-gate-clockmXmodem_fck@a00ti,omap3-interface-clock Xsad2d_ick@a10ti,omap3-interface-clock= Xmad2d_ick@a18ti,omap3-interface-clock= Xmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock Xnssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$Xossi_ssr_fck_3430es2ti,composite-clocknoXpssi_sst_fck_3430es2fixed-factor-clockp Xhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockH Xssi_ick_3430es2@a10ti,omap3-ssi-interface-clockq Xusim_gate_fck@c00ti,composite-gate-clockD  X|sys_d2_ckfixed-factor-clock Xsomap_96m_d2_fckfixed-factor-clockD Xtomap_96m_d4_fckfixed-factor-clockD Xuomap_96m_d8_fckfixed-factor-clockD Xvomap_96m_d10_fckfixed-factor-clockD Xwdpll5_m2_d4_ckfixed-factor-clockr Xxdpll5_m2_d8_ckfixed-factor-clockr Xydpll5_m2_d16_ckfixed-factor-clockr Xzdpll5_m2_d20_ckfixed-factor-clockr X{usim_mux_fck@c40ti,composite-mux-clock(stuvwxyz{ @X}usim_fckti,composite-clock|}usim_ick@c10ti,omap3-interface-clockM  Xdpll5_ck@d04ti,omap3-dpll-clock  $ L 4pX~dpll5_m2_ck@d50ti,divider-clock~ PXrsgx_gate_fck@b00ti,composite-gate-clock% Xcore_d3_ckfixed-factor-clock% Xcore_d4_ckfixed-factor-clock% Xcore_d6_ckfixed-factor-clock% Xomap_192m_alwon_fckfixed-factor-clock! Xcore_d2_ckfixed-factor-clock% Xsgx_mux_fck@b40ti,composite-mux-clock ) @Xsgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock= Xcpefuse_fck@a08ti,gate-clock Xts_fck@a08ti,gate-clock? Xusbtll_fck@a08ti,wait-gate-clockr Xusbtll_ick@a18ti,omap3-interface-clockI Xmmchs3_ick@a10ti,omap3-interface-clockI Xmmchs3_fck@a00ti,wait-gate-clock Xdss1_alwon_fck_3430es2@e00ti,dss-gate-clockGXdss_ick_3430es2@e10ti,omap3-dss-interface-clock>Xusbhost_120m_fck@1400ti,gate-clockrXusbhost_48m_fck@1400ti,dss-gate-clock/Xusbhost_ick@1410ti,omap3-dss-interface-clock>Xclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainedpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainld2d_clkdmti,clockdomain dpll5_clkdmti,clockdomain~sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH Xdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmaXgpio@48310000ti,omap3-gpioH1gpio1Xgpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6Xserial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3li2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H ti,twl4030defaultaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci )7 Cvacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1v ' regulator-vdacti,twl4030-vdacvw@w@Xregulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1v:0Xregulator-vmmc2ti,twl4030-vmmc2v:0regulator-vusb1v5ti,twl4030-vusb1v5Xregulator-vusb1v8ti,twl4030-vusb1v8Xregulator-vusb3v1ti,twl4030-vusb3v1Xregulator-vpll1ti,twl4030-vpll1 gvdds_dsivw@w@Xregulator-vpll2ti,twl4030-vpll2vw@w@regulator-vsimti,twl4030-vsimvw@-Xgpioti,twl4030-gpioT`Xtwl4030-usbti,twl4030-usb m{pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadD?  @A Bsrmadcti,twl4030-madcXi2c@48072000 ti,omap3-i2cH 9txrx+i2c2Xi2c@48060000 ti,omap3-i2cH=txrx+i2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxH @ dsp / :spi@48098000ti,omap2-mcspiH A+mcspi1E@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2E +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3E tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4EFGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1S=>txrx`mymmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_ispXmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 disabledmcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokayXmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HDL ehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx8D+ 0,Xnand@0,0ti,omap2-nand  Vewsw,,",(6@,R=RN(`+x-loader@0 xX-Loaderbootloaders@80000xU-Bootbootloaders_env@260000 xU-Boot Env&kernel@280000xKernel(@filesystem@680000 xFile Systemhethernet@6,0davicom,dm9000~ e066,= %Z<ZVn`Nusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs dss@48050000 ti,omap3-dssHok dss_corefck+defaultdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckportendpointXport+endpoint@0Xendpoint@1ssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ p ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+ 'isp@480bc000 ti,omap3-ispH H |`lports+bandgap@48002524H%$ti,omap34xx-bandgapXtarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivathermal-zonescpu_thermal*@NN [memory@80000000vmemoryleds gpio-ledsheartbeatxdevkit8000::led1 kqon heartbeatmmcxdevkit8000::led2 kqonnoneusrxdevkit8000::led3 kqonusrpmu_statxdevkit8000::pmu_stat ksoundti,omap-twl4030 devkit8000IExt SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuserxuser kencoder0 ti,tfp410 ports+port@0endpointXport@1endpointXconnector0dvi-connectorxdviportendpointXconnector1svideo-connectorxtvportendpointX compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display1display2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-size#sound-dai-cellsti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsti,sysc-maskpolling-delay-passivepolling-delaycoefficientsthermal-sensorsgpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-bus