Ð þíZß8T\(ƒT$.,rockchip,px3-evbrockchip,px3rockchip,rk31887Rockchip PX3-EVBaliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/mmc@1021c000f/mmc@10214000l/mmc@10218000r/serial@10124000z/serial@10126000‚/serial@20064000Š/serial@20068000’/spi@20070000—/spi@20074000bus ,simple-busœdma-controller@20018000,arm,pl330arm,primecell£ €@§²½ØïÀ öapb_pclk6dma-controller@2001c000,arm,pl330arm,primecell£ À@§²½ØïÀ öapb_pclk  disableddma-controller@20078000,arm,pl330arm,primecell£ €@§²½ØïÁ öapb_pclk oscillator ,fixed-clockn6!.xin24mgpu@10090000",rockchip,rk3188-maliarm,mali-400£ ïÅÅ öbuscoreAÅQõáfx  disabledx§ 5mgpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3}cache-controller@10138000,arm,pl310-cache£€‹™0scu@1013c000,arm,cortex-a9-scu£Àglobal-timer@1013c200,arm,cortex-a9-global-timer£  § ï  disabledlocal-timer@1013c600,arm,cortex-a9-twd-timer£Æ  § ïinterrupt-controller@1013d000,arm,cortex-a9-gic¥º£ÐÁserial@10124000&,rockchip,rk3188-uartsnps,dw-apb-uart£@ §"ËÕöbaudclkapb_pclkï@L okayâdefaultðserial@10126000&,rockchip,rk3188-uartsnps,dw-apb-uart£` §#ËÕöbaudclkapb_pclkïAM okayâdefaultðqos@1012d000,syscon£Ð qos@1012e000,syscon£à qos@1012f000,syscon£ð qos@1012f080,syscon£ð€ qos@1012f100,syscon£ñ qos@1012f180,syscon£ñ€ qos@1012f200,syscon£ò qos@1012f280,syscon£ò€ usb@10180000,rockchip,rk3066-usbsnps,dwc2£ §ïÃöotgúotg#€€@@ 2 7usb2-phy okayusb@101c0000 ,snps,dwc2£ §ïÉöotgúhost2 7usb2-phy okayethernet@10204000,rockchip,rk3188-emac£ @< §AïÄD öhclkmacrefNdXrmii  disabledmmc@10214000,rockchip,rk2928-dw-mshc£!@ §ïÀHöbiuciua frx-txpfQ{reset okayâdefault𠇓¯Àmmc@10218000,rockchip,rk2928-dw-mshc£!€ §ïÁIöbiuciua frx-txpfR{reset  disabledmmc@1021c000,rockchip,rk2928-dw-mshc£!À §ïÂJöbiuciua frx-txpfS{reset okay“Ëâdefault ðpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd£ @8reboot-mode,syscon-reboot-modeÙ@àRBÃìRBÃúRBà  RBÃpower-controller!,rockchip,rk3188-power-controllerpd_vio@7£hïÃľ¿ÍÎOÊÐÈÑÉÒ*pd_video@6£ ïÎÍØ×*pd_gpu@8£ïÅ*grf@20008000,syscon£ €i2c@2002d000,rockchip,rk3188-i2c£ Ð §(Aöi2cïP okayâdefaultðaccelerometer@18 ,bosch,bma250£§i2c@2002f000,rockchip,rk3188-i2c£ ð §)AïQöi2c okayâdefaultð€pmic@1c,rockchip,rk818£§ 1R!.xin32krk808-clkout2`lx„œ¨´regulatorsDCDC_REG1ÀÔæ q°þ™pvdd_arm2regulator-state-mem%DCDC_REG2ÀÔæ øPþÐvdd_gpuregulator-state-mem>VB@DCDC_REG3ÀÔvcc_ddrregulator-state-mem>DCDC_REG4ÀÔæ2Z þ2Z vcc_ioregulator-state-mem>V2Z LDO_REG1æ2Z þ2Z vcc_cifLDO_REG2ÀÔæ2Z þ2Z  vcc_jetta33LDO_REG3ÀÔæB@þB@vdd_10regulator-state-mem>VB@LDO_REG4æw@þw@lvds_12LDO_REG5æw@þ2Z lvds_25LDO_REG6æB@þB@cif_18LDO_REG7æw@þ2Z vcc_sdregulator-state-mem>V2Z LDO_REG8æw@þ2Z wl_18SWITCH_REG1lcd_33pwm@20030000,rockchip,rk2928-pwm£ rïF  disabledâdefaultðpwm@20030010,rockchip,rk2928-pwm£ rïF okayâdefaultðwatchdog@2004c000 ,rockchip,rk3188-wdtsnps,dw-wdt£ ÀïK §3 okaypwm@20050020,rockchip,rk2928-pwm£  rïG okayâdefaultð pwm@20050030,rockchip,rk2928-pwm£ 0rïG okayâdefaultð!i2c@20056000,rockchip,rk3188-i2c£ ` §*AïRöi2c  disabledâdefaultð"touchscreen@40,silead,gsl1680£@#§ }‰ œ¯i2c@2005a000,rockchip,rk3188-i2c£   §+AïSöi2c  disabledâdefaultð$i2c@2005e000,rockchip,rk3188-i2c£ à §4AïTöi2c  disabledâdefaultð%serial@20064000&,rockchip,rk3188-uartsnps,dw-apb-uart£ @ §$ËÕöbaudclkapb_pclkïBN okayâdefaultð&serial@20068000&,rockchip,rk3188-uartsnps,dw-apb-uart£ € §%ËÕöbaudclkapb_pclkïCO okayâdefaultð'saradc@2006c000,rockchip,saradc£ À §ÂïGJösaradcapb_pclkfW {saradc-apb  disabledspi@20070000(,rockchip,rk3188-spirockchip,rk3066-spiïEHöspiclkapb_pclk §&£ a ftxrx  disabledâdefaultð()*+spi@20074000(,rockchip,rk3188-spirockchip,rk3066-spiïFIöspiclkapb_pclk §'£ @a ftxrx  disabledâdefaultð,-./cpusÔrockchip,rk3066-smpcpu@0âcpu,arm,cortex-a9î0£ÿœ@ï 1f!2cpu@1âcpu,arm,cortex-a9î0£ 1f!2cpu@2âcpu,arm,cortex-a9î0£ 1f!2cpu@3âcpu,arm,cortex-a9î0£ 1f!2opp_table0,operating-points-v2,1opp-3120000007˜¾> YøLœ@opp-5040000007 n>Hopp-6000000007#ÃF>~ð]opp-81600000070£,>à˜opp-10080000007<Ü>g8opp-12000000007G†Œ>Œ0opp-14160000007Tfr>Ðopp-16080000007_Ø">™pdisplay-subsystem,rockchip,display-subsystemi34sram@10080000 ,mmio-sram£€ œ€smp-sram@0,rockchip,rk3066-smp-sram£Pvop@1010c000,rockchip,rk3188-vop£À § ïþÍöaclk_vopdclk_vophclk_vop}fdef {axiahbdclk  disabledport3vop@1010e000,rockchip,rk3188-vop£à §ïÄ¿Îöaclk_vopdclk_vophclk_vop}fghi {axiahbdclk  disabledport4timer@2000e000,,rockchip,rk3188-timerrockchip,rk3288-timer£ à  §.ïWE ötimerpclktimer@200380a0,,rockchip,rk3188-timerrockchip,rk3288-timer£ €   §@ïZB ötimerpclki2s@1011a000(,rockchip,rk3188-i2srockchip,rk3066-i2s£   § âdefaultð5ïKÆöi2s_clki2s_hclka66ftxrxoŠ¤  disabledsound@1011e000,,rockchip,rk3188-spdifrockchip,rk3066-spdif£à ¤ïNÅ ömclkhclka6ftx § âdefaultð7  disabledclock-controller@20000000,rockchip,rk3188-cru£ A!µefuse@20010000,rockchip,rk3188-efuse£ @ï[ öpclk_efusecpu_leakage@17£phy0,rockchip,rk3188-usb-phyrockchip,rk3288-usb-phyA okayusb-phy@10c£ ïQöphyclk!usb-phy@11c£ïRöphyclk!pinctrl,rockchip,rk3188-pinctrlAÍ8œgpio0@2000a000,rockchip,rk3188-gpio-bank0£   §6ïUÚꥺgpio1@2003c000,rockchip,gpio-bank£ À §7ïVÚꥺ#gpio2@2003e000,rockchip,gpio-bank£ à §8ïWÚꥺgpio3@20080000,rockchip,gpio-bank£  §9ïXÚꥺpcfg_pull_upö:pcfg_pull_downpcfg_pull_none9emmcemmc-clk9emmc-cmd:emmc-rst9emacemac-xfer€99999999emac-mdio 99i2c0i2c0-xfer 99i2c1i2c1-xfer 99i2c2i2c2-xfer 99"i2c3i2c3-xfer 99$i2c4i2c4-xfer 99%lcdc1lcdc1-dclk9lcdc1-den9lcdc1-hsync9lcdc1-vsync9ldcd1-rgb24€999999999 9 9 9 9 99999999999pwm0pwm0-out9pwm1pwm1-out9pwm2pwm2-out9 pwm3pwm3-out9!spi0spi0-clk:(spi0-cs0:+spi0-tx:)spi0-rx:*spi0-cs1:spi1spi1-clk:,spi1-cs0:/spi1-rx:.spi1-tx:-spi1-cs1:uart0uart0-xfer :9uart0-cts9uart0-rts9uart1uart1-xfer :9uart1-cts9uart1-rts9uart2uart2-xfer : 9&uart3uart3-xfer  : 9'uart3-cts 9uart3-rts 9sd0sd0-clk9 sd0-cmd9 sd0-cd9 sd0-wp 9sd0-pwr9sd0-bus-width19sd0-bus-width4@9999 sd1sd1-clk9sd1-cmd9sd1-cd9sd1-wp9sd1-bus-width19sd1-bus-width4@9999i2s0i2s0-bus`9999995spdifspdif-tx97pcfg-output-low-usbhost-vbus-drv9otg-vbus-drv9chosen8serial2:115200n8memory@60000000£`€âmemorygpio-keys ,gpio-keysDpower ƒOtZGPIO Key Power`Rqdvsys-regulator,regulator-fixedvsysæLK@þLK@Ô #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1rangesreginterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesphandlestatusclock-frequency#clock-cellsclock-output-namesassigned-clocksassigned-clock-ratesresetsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthpinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modedmasdma-namesfifo-depthreset-namesvmmc-supplybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpnon-removableoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellspower-gpiostouchscreen-size-xtouchscreen-size-ysilead,max-fingers#io-channel-cellsenable-methoddevice_typenext-level-cacheclock-latencyoperating-points-v2cpu-supplyopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cells#phy-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disablerockchip,pinsoutput-lowstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-interval