Q8( Qgumstix,omap3-overo-tobiduogumstix,omap3-overoti,omap3630ti,omap36xxti,omap3 +07OMAP36xx/AM37xx/DM37xx Gumstix Overo on TobiDuochosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8{cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ 3Qndefault|pinmux_uart2_pins <>@Bpinmux_i2c1_pinspinmux_mmc1_pins0pinmux_mmc2_pins0(*,.02pinmux_w3cbw003c_pinslpinmux_hsusb2_pins@      pinmux_twl4030_pinsApinmux_i2c3_pinspinmux_uart3_pinsnpscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ 3Qpinmux_twl4030_vpins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `Lrevsyscsyss ick+ H ` aes1@0 ti,omap3-aesP,  1txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PLrevsyscsyss ick+ H P aes2@0 ti,omap3-aesP,AB1txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clock;Yosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockKpV"sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockmxdpll3_m2x2_ckfixed-factor-clockmx!dpll4_x2_ckfixed-factor-clock mxcorex2_fckfixed-factor-clock!mx#wkup_l4_ickfixed-factor-clock"mxRcorex2_d3_fckfixed-factor-clock#mxcorex2_d5_fckfixed-factor-clock#mxclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clock;omap_32k_fck fixed-clock;Dvirt_12m_ck fixed-clock;virt_13m_ck fixed-clock;]@virt_19200000_ck fixed-clock;$virt_26000000_ck fixed-clock;virt_38_4m_ck fixed-clock;Idpll4_ck@d00ti,omap3-dpll-per-j-type-clock"" D 0 dpll4_m2_ck@d48ti,divider-clock K? HV$dpll4_m2x2_mul_ckfixed-factor-clock$mx%dpll4_m2x2_ck@d00ti,hsdiv-gate-clock% &omap_96m_alwon_fckfixed-factor-clock&mx-dpll3_ck@d00ti,omap3-dpll-core-clock"" @ 0dpll3_m3_ck@1140ti,divider-clockK@V'dpll3_m3x2_mul_ckfixed-factor-clock'mx(dpll3_m3x2_ck@d00ti,hsdiv-gate-clock(  )emu_core_alwon_ckfixed-factor-clock)mxfsys_altclk fixed-clock;2mcbsp_clks fixed-clock;dpll3_m2_ck@d40ti,divider-clockK @Vcore_ckfixed-factor-clockmx*dpll1_fck@940ti,divider-clock*K @V+dpll1_ck@904ti,omap3-dpll-clock"+  $ @ 4dpll1_x2_ckfixed-factor-clockmx,dpll1_x2m2_ck@944ti,divider-clock,K DV@cm_96m_fckfixed-factor-clock-mx.omap_96m_fck@d40 ti,mux-clock." @Idpll4_m3_ck@e40ti,divider-clock K @V/dpll4_m3x2_mul_ckfixed-factor-clock/mx0dpll4_m3x2_ck@d00ti,hsdiv-gate-clock0 1omap_54m_fck@d40 ti,mux-clock12 @<cm_96m_d2_fckfixed-factor-clock.mx3omap_48m_fck@d40 ti,mux-clock32 @4omap_12m_fckfixed-factor-clock4mxKdpll4_m4_ck@e40ti,divider-clock K@V5dpll4_m4x2_mul_ckti,fixed-factor-clock56dpll4_m4x2_ck@d00ti,gate-clock6 dpll4_m5_ck@f40ti,divider-clock K?@V7dpll4_m5x2_mul_ckti,fixed-factor-clock78dpll4_m5x2_ck@d00ti,hsdiv-gate-clock8 ndpll4_m6_ck@1140ti,divider-clock K?@V9dpll4_m6x2_mul_ckfixed-factor-clock9mx:dpll4_m6x2_ck@d00ti,hsdiv-gate-clock: ;emu_per_alwon_ckfixed-factor-clock;mxgclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* p=clkout2_src_mux_ck@d70ti,composite-mux-clock*".< p>clkout2_src_ckti,composite-clock=>?sys_clkout2@d70ti,divider-clock?K@ pmpu_ckfixed-factor-clock@mxAarm_fck@924ti,divider-clockA $Kemu_mpu_alwon_ckfixed-factor-clockAmxhl3_ick@a40ti,divider-clock*K @VBl4_ick@a40ti,divider-clockBK @VCrm_ick@c40ti,divider-clockCK @Vgpt10_gate_fck@a00ti,composite-gate-clock"  Egpt10_mux_fck@a40ti,composite-mux-clockD" @Fgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock"  Ggpt11_mux_fck@a40ti,composite-mux-clockD" @Hgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockImxmmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock   mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock4mxJmcspi4_fck@a00ti,wait-gate-clockJ mcspi3_fck@a00ti,wait-gate-clockJ mcspi2_fck@a00ti,wait-gate-clockJ mcspi1_fck@a00ti,wait-gate-clockJ uart2_fck@a00ti,wait-gate-clockJ uart1_fck@a00ti,wait-gate-clockJ  core_12m_fckfixed-factor-clockKmxLhdq_fck@a00ti,wait-gate-clockL core_l3_ickfixed-factor-clockBmxMsdrc_ick@a10ti,wait-gate-clockM gpmc_fckfixed-factor-clockMmxcore_l4_ickfixed-factor-clockCmxNmmchs2_ick@a10ti,omap3-interface-clockN mmchs1_ick@a10ti,omap3-interface-clockN hdq_ick@a10ti,omap3-interface-clockN mcspi4_ick@a10ti,omap3-interface-clockN mcspi3_ick@a10ti,omap3-interface-clockN mcspi2_ick@a10ti,omap3-interface-clockN mcspi1_ick@a10ti,omap3-interface-clockN i2c3_ick@a10ti,omap3-interface-clockN i2c2_ick@a10ti,omap3-interface-clockN i2c1_ick@a10ti,omap3-interface-clockN uart2_ick@a10ti,omap3-interface-clockN uart1_ick@a10ti,omap3-interface-clockN  gpt11_ick@a10ti,omap3-interface-clockN  gpt10_ick@a10ti,omap3-interface-clockN  mcbsp5_ick@a10ti,omap3-interface-clockN  mcbsp1_ick@a10ti,omap3-interface-clockN  omapctrl_ick@a10ti,omap3-interface-clockN dss_tv_fck@e00ti,gate-clock<dss_96m_fck@e00ti,gate-clockIdss2_alwon_fck@e00ti,gate-clock"dummy_ck fixed-clock;gpt1_gate_fck@c00ti,composite-gate-clock" Ogpt1_mux_fck@c40ti,composite-mux-clockD" @Pgpt1_fckti,composite-clockOPaes2_ick@a10ti,omap3-interface-clockN wkup_32k_fckfixed-factor-clockDmxQgpio1_dbck@c00ti,gate-clockQ sha12_ick@a10ti,omap3-interface-clockN wdt2_fck@c00ti,wait-gate-clockQ wdt2_ick@c10ti,omap3-interface-clockR wdt1_ick@c10ti,omap3-interface-clockR gpio1_ick@c10ti,omap3-interface-clockR omap_32ksync_ick@c10ti,omap3-interface-clockR gpt12_ick@c10ti,omap3-interface-clockR gpt1_ick@c10ti,omap3-interface-clockR per_96m_fckfixed-factor-clock-mx per_48m_fckfixed-factor-clock4mxSuart3_fck@1000ti,wait-gate-clockS gpt2_gate_fck@1000ti,composite-gate-clock"Tgpt2_mux_fck@1040ti,composite-mux-clockD"@Ugpt2_fckti,composite-clockTUgpt3_gate_fck@1000ti,composite-gate-clock"Vgpt3_mux_fck@1040ti,composite-mux-clockD"@Wgpt3_fckti,composite-clockVWgpt4_gate_fck@1000ti,composite-gate-clock"Xgpt4_mux_fck@1040ti,composite-mux-clockD"@Ygpt4_fckti,composite-clockXYgpt5_gate_fck@1000ti,composite-gate-clock"Zgpt5_mux_fck@1040ti,composite-mux-clockD"@[gpt5_fckti,composite-clockZ[gpt6_gate_fck@1000ti,composite-gate-clock"\gpt6_mux_fck@1040ti,composite-mux-clockD"@]gpt6_fckti,composite-clock\]gpt7_gate_fck@1000ti,composite-gate-clock"^gpt7_mux_fck@1040ti,composite-mux-clockD"@_gpt7_fckti,composite-clock^_gpt8_gate_fck@1000ti,composite-gate-clock" `gpt8_mux_fck@1040ti,composite-mux-clockD"@agpt8_fckti,composite-clock`agpt9_gate_fck@1000ti,composite-gate-clock" bgpt9_mux_fck@1040ti,composite-mux-clockD"@cgpt9_fckti,composite-clockbcper_32k_alwon_fckfixed-factor-clockDmxdgpio6_dbck@1000ti,gate-clockdgpio5_dbck@1000ti,gate-clockdgpio4_dbck@1000ti,gate-clockdgpio3_dbck@1000ti,gate-clockdgpio2_dbck@1000ti,gate-clockd wdt3_fck@1000ti,wait-gate-clockd per_l4_ickfixed-factor-clockCmxegpio6_ick@1010ti,omap3-interface-clockegpio5_ick@1010ti,omap3-interface-clockegpio4_ick@1010ti,omap3-interface-clockegpio3_ick@1010ti,omap3-interface-clockegpio2_ick@1010ti,omap3-interface-clocke wdt3_ick@1010ti,omap3-interface-clocke uart3_ick@1010ti,omap3-interface-clocke uart4_ick@1010ti,omap3-interface-clockegpt9_ick@1010ti,omap3-interface-clocke gpt8_ick@1010ti,omap3-interface-clocke gpt7_ick@1010ti,omap3-interface-clockegpt6_ick@1010ti,omap3-interface-clockegpt5_ick@1010ti,omap3-interface-clockegpt4_ick@1010ti,omap3-interface-clockegpt3_ick@1010ti,omap3-interface-clockegpt2_ick@1010ti,omap3-interface-clockemcbsp2_ick@1010ti,omap3-interface-clockemcbsp3_ick@1010ti,omap3-interface-clockemcbsp4_ick@1010ti,omap3-interface-clockemcbsp2_gate_fck@1000ti,composite-gate-clockmcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clock"fgh@iemu_src_ckti,clkdm-gate-clockijpclk_fck@1140ti,divider-clockjK@Vpclkx2_fck@1140ti,divider-clockjK@Vatclk_fck@1140ti,divider-clockjK@Vtraceclk_src_fck@1140 ti,mux-clock"fgh@ktraceclk_fck@1140ti,divider-clockk K@Vsecure_32k_fck fixed-clock;lgpt12_fckfixed-factor-clocklmxwdt1_fckfixed-factor-clocklmxsecurity_l4_ick2fixed-factor-clockCmxmaes1_ick@a14ti,omap3-interface-clockm rng_ick@a14ti,omap3-interface-clockm sha11_ick@a14ti,omap3-interface-clockm des1_ick@a14ti,omap3-interface-clockm cam_mclk@f00ti,gate-clockncam_ick@f10!ti,omap3-no-wait-interface-clockCcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockBmxopka_ick@a14ti,omap3-interface-clocko icr_ick@a10ti,omap3-interface-clockN des2_ick@a10ti,omap3-interface-clockN mspro_ick@a10ti,omap3-interface-clockN mailboxes_ick@a10ti,omap3-interface-clockN ssi_l4_ickfixed-factor-clockCmxvsr1_fck@c00ti,wait-gate-clock" sr2_fck@c00ti,wait-gate-clock" sr_l4_ickfixed-factor-clockCmxdpll2_fck@40ti,divider-clock*K@Vpdpll2_ck@4ti,omap3-dpll-clock"p$@4qdpll2_m2_ck@44ti,divider-clockqKDVriva2_ck@0ti,wait-gate-clockrmodem_fck@a00ti,omap3-interface-clock" sad2d_ick@a10ti,omap3-interface-clockB mad2d_ick@a18ti,omap3-interface-clockB mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock# sssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock# @$ tssi_ssr_fck_3430es2ti,composite-clockstussi_sst_fck_3430es2fixed-factor-clockumx hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockM ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockv  usim_gate_fck@c00ti,composite-gate-clockI  sys_d2_ckfixed-factor-clock"mxxomap_96m_d2_fckfixed-factor-clockImxyomap_96m_d4_fckfixed-factor-clockImxzomap_96m_d8_fckfixed-factor-clockImx{omap_96m_d10_fckfixed-factor-clockImx |dpll5_m2_d4_ckfixed-factor-clockwmx}dpll5_m2_d8_ckfixed-factor-clockwmx~dpll5_m2_d16_ckfixed-factor-clockwmxdpll5_m2_d20_ckfixed-factor-clockwmxusim_mux_fck@c40ti,composite-mux-clock("xyz{|}~ @Vusim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockR  dpll5_ck@d04ti,omap3-dpll-clock""  $ L 4dpll5_m2_ck@d50ti,divider-clockK PVwsgx_gate_fck@b00ti,composite-gate-clock* core_d3_ckfixed-factor-clock*mxcore_d4_ckfixed-factor-clock*mxcore_d6_ckfixed-factor-clock*mxomap_192m_alwon_fckfixed-factor-clock&mxcore_d2_ckfixed-factor-clock*mxsgx_mux_fck@b40ti,composite-mux-clock . @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clockB cpefuse_fck@a08ti,gate-clock" ts_fck@a08ti,gate-clockD usbtll_fck@a08ti,wait-gate-clockw usbtll_ick@a18ti,omap3-interface-clockN mmchs3_ick@a10ti,omap3-interface-clockN mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockCusbhost_120m_fck@1400ti,gate-clockwusbhost_48m_fck@1400ti,dss-gate-clock4usbhost_ick@1410ti,omap3-dss-interface-clockCuart4_fck@1000ti,wait-gate-clockSclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainjdpll4_clkdmti,clockdomain wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainqd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscQfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intc H 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J'lis33-3v3-regregulator-fixedlis33-3v3-reg2Z2Zlis33-1v8-regregulator-fixedlis33-1v8-regw@w@regulator-vddvarioregulator-fixed vddvario regulator-vdd33aregulator-fixedvdd33a  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellsphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatuspagesizeVdd-supplyVdd_IO-supplyst,click-single-xst,click-single-yst,click-single-zst,click-thresh-xst,click-thresh-yst,click-thresh-zst,irq1-clickst,irq2-clickst,wakeup-x-lost,wakeup-x-hist,wakeup-y-lost,wakeup-y-hist,wakeup-z-lost,wakeup-z-hist,min-limit-xst,min-limit-yst,min-limit-zst,max-limit-xst,max-limit-yst,max-limit-z#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthvqmmc-supplycap-sdio-irqnon-removable#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicepwmsmax-brightnesslinux,default-triggerti,modelti,mcbspgpiostartup-delay-usenable-active-highreset-gpiosvcc-supplyregulator-always-on