8p(780ti,omap3-gta04ti,omap3630ti,omap36xxti,omap3 +7Goldelico GTA04A5/Letux 2804chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/mmc@4809c000]/ocp@68000000/mmc@480b4000b/ocp@68000000/mmc@480ad000g/ocp@68000000/serial@4806a000o/ocp@68000000/serial@4806c000w/ocp@68000000/serial@49020000/ocp@68000000/serial@49042000/spi_lcd/td028ttec1@0 /connectorcpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuT debugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +!l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ !Hscm@2000ti,omap3-scmsimple-bus + ! pinmux@30 ti,omap3-padconfpinctrl-single08+(7H]{default*7Goldelico GTA04A5/Letux 2804 with OneNANDpinmux_hsusb2_pins0      pinmux_uart1_pinsRLpinmux_uart2_pinsJHpinmux_uart3_pinsnppinmux_mmc1_pins0backlight_pins_pinmux)pinmux_dss_dpi_pinspinmux_gps_pinsF hdq_pinspinmux_bmp085_pinspinmux_bma180_pins pinmux_itg3200_pinspinmux_hmc5843_pinspinmux_penirq_pinsdpinmux_camera_pins pinmux_mcbsp1_pins0\^`bfhpinmux_mcbsp2_pins  pinmux_mcbsp3_pins <>@Bpinmux_mcbsp4_pinsTVZpinmux_twl4030_pinsApinmux_bt_pins6pinmux_wlan_pins80pinmux_wlan_irq_pin:pinmux_irdapinmux_pps_pins1pinmux_gpmc_pinshJLNnprtvxz|scm_conf@270sysconsimple-busp0+ !p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68 ti,composite-mux-clock h mcbsp5_fck ti,composite-clock  mcbsp1_mux_fck@4 ti,composite-mux-clock  mcbsp1_fck ti,composite-clock mcbsp2_mux_fck@4 ti,composite-mux-clock mcbsp2_fck ti,composite-clockmcbsp3_mux_fck@68 ti,composite-mux-clock hmcbsp3_fck ti,composite-clockmcbsp4_mux_fck@68 ti,composite-mux-clock hmcbsp4_fck ti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+(7H]{pinmux_gpio1_pinsAApinmux_twl4030_vpins target-module@480a6000ti,sysc-omap2ti,syscH `DH `HH `L$revsyscsyss. ;Iick+ !H ` aes1@0 ti,omap3-aesP V  [txrxtarget-module@480c5000ti,sysc-omap2ti,syscH PDH PHH PL$revsyscsyss. ;Iick+ !H P aes2@0 ti,omap3-aesP VAB[txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck  fixed-clockeYosc_sys_ck@d40  ti,mux-clock @sys_ck@1270 ti,divider-clockup#sys_clkout1@d70 ti,gate-clock pdpll3_x2_ck fixed-factor-clockdpll3_m2x2_ck fixed-factor-clock "dpll4_x2_ck fixed-factor-clock!corex2_fck fixed-factor-clock"$wkup_l4_ick fixed-factor-clock#Scorex2_d3_fck fixed-factor-clock$corex2_d5_fck fixed-factor-clock$clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk  fixed-clockeomap_32k_fck  fixed-clockeEvirt_12m_ck  fixed-clockevirt_13m_ck  fixed-clocke]@virt_19200000_ck  fixed-clocke$virt_26000000_ck  fixed-clockevirt_38_4m_ck  fixed-clockeIdpll4_ck@d00 ti,omap3-dpll-per-j-type-clock## D 0!dpll4_m2_ck@d48 ti,divider-clock!u? H%dpll4_m2x2_mul_ck fixed-factor-clock%&dpll4_m2x2_ck@d00 ti,hsdiv-gate-clock& 'omap_96m_alwon_fck fixed-factor-clock'.dpll3_ck@d00 ti,omap3-dpll-core-clock## @ 0dpll3_m3_ck@1140 ti,divider-clocku@(dpll3_m3x2_mul_ck fixed-factor-clock()dpll3_m3x2_ck@d00 ti,hsdiv-gate-clock)  *emu_core_alwon_ck fixed-factor-clock*gsys_altclk  fixed-clocke3mcbsp_clks  fixed-clocke dpll3_m2_ck@d40 ti,divider-clocku @ core_ck fixed-factor-clock +dpll1_fck@940 ti,divider-clock+u @,dpll1_ck@904 ti,omap3-dpll-clock#,  $ @ 4dpll1_x2_ck fixed-factor-clock-dpll1_x2m2_ck@944 ti,divider-clock-u DAcm_96m_fck fixed-factor-clock./omap_96m_fck@d40  ti,mux-clock/# @Jdpll4_m3_ck@e40 ti,divider-clock!u @0dpll4_m3x2_mul_ck fixed-factor-clock01dpll4_m3x2_ck@d00 ti,hsdiv-gate-clock1 2omap_54m_fck@d40  ti,mux-clock23 @=cm_96m_d2_fck fixed-factor-clock/4omap_48m_fck@d40  ti,mux-clock43 @5omap_12m_fck fixed-factor-clock5Ldpll4_m4_ck@e40 ti,divider-clock!u@6dpll4_m4x2_mul_ck ti,fixed-factor-clock67dpll4_m4x2_ck@d00 ti,gate-clock7 dpll4_m5_ck@f40 ti,divider-clock!u?@8dpll4_m5x2_mul_ck ti,fixed-factor-clock89dpll4_m5x2_ck@d00 ti,hsdiv-gate-clock9 odpll4_m6_ck@1140 ti,divider-clock!u?@:dpll4_m6x2_mul_ck fixed-factor-clock:;dpll4_m6x2_ck@d00 ti,hsdiv-gate-clock; <emu_per_alwon_ck fixed-factor-clock<hclkout2_src_gate_ck@d70  ti,composite-no-wait-gate-clock+ p>clkout2_src_mux_ck@d70 ti,composite-mux-clock+#/= p?clkout2_src_ck ti,composite-clock>?@sys_clkout2@d70 ti,divider-clock@u@ pmpu_ck fixed-factor-clockABarm_fck@924 ti,divider-clockB $uemu_mpu_alwon_ck fixed-factor-clockBil3_ick@a40 ti,divider-clock+u @Cl4_ick@a40 ti,divider-clockCu @Drm_ick@c40 ti,divider-clockDu @gpt10_gate_fck@a00 ti,composite-gate-clock#  Fgpt10_mux_fck@a40 ti,composite-mux-clockE# @Ggpt10_fck ti,composite-clockFGgpt11_gate_fck@a00 ti,composite-gate-clock#  Hgpt11_mux_fck@a40 ti,composite-mux-clockE# @Igpt11_fck ti,composite-clockHIcore_96m_fck fixed-factor-clockJmmchs2_fck@a00 ti,wait-gate-clock mmchs1_fck@a00 ti,wait-gate-clock i2c3_fck@a00 ti,wait-gate-clock i2c2_fck@a00 ti,wait-gate-clock i2c1_fck@a00 ti,wait-gate-clock mcbsp5_gate_fck@a00 ti,composite-gate-clock    mcbsp1_gate_fck@a00 ti,composite-gate-clock    core_48m_fck fixed-factor-clock5Kmcspi4_fck@a00 ti,wait-gate-clockK mcspi3_fck@a00 ti,wait-gate-clockK mcspi2_fck@a00 ti,wait-gate-clockK mcspi1_fck@a00 ti,wait-gate-clockK uart2_fck@a00 ti,wait-gate-clockK uart1_fck@a00 ti,wait-gate-clockK  core_12m_fck fixed-factor-clockLMhdq_fck@a00 ti,wait-gate-clockM core_l3_ick fixed-factor-clockCNsdrc_ick@a10 ti,wait-gate-clockN gpmc_fck fixed-factor-clockNcore_l4_ick fixed-factor-clockDOmmchs2_ick@a10 ti,omap3-interface-clockO mmchs1_ick@a10 ti,omap3-interface-clockO hdq_ick@a10 ti,omap3-interface-clockO mcspi4_ick@a10 ti,omap3-interface-clockO mcspi3_ick@a10 ti,omap3-interface-clockO mcspi2_ick@a10 ti,omap3-interface-clockO mcspi1_ick@a10 ti,omap3-interface-clockO i2c3_ick@a10 ti,omap3-interface-clockO i2c2_ick@a10 ti,omap3-interface-clockO i2c1_ick@a10 ti,omap3-interface-clockO uart2_ick@a10 ti,omap3-interface-clockO uart1_ick@a10 ti,omap3-interface-clockO  gpt11_ick@a10 ti,omap3-interface-clockO  gpt10_ick@a10 ti,omap3-interface-clockO  mcbsp5_ick@a10 ti,omap3-interface-clockO  mcbsp1_ick@a10 ti,omap3-interface-clockO  omapctrl_ick@a10 ti,omap3-interface-clockO dss_tv_fck@e00 ti,gate-clock=dss_96m_fck@e00 ti,gate-clockJdss2_alwon_fck@e00 ti,gate-clock#dummy_ck  fixed-clockegpt1_gate_fck@c00 ti,composite-gate-clock# Pgpt1_mux_fck@c40 ti,composite-mux-clockE# @Qgpt1_fck ti,composite-clockPQ aes2_ick@a10 ti,omap3-interface-clockO wkup_32k_fck fixed-factor-clockERgpio1_dbck@c00 ti,gate-clockR sha12_ick@a10 ti,omap3-interface-clockO wdt2_fck@c00 ti,wait-gate-clockR wdt2_ick@c10 ti,omap3-interface-clockS wdt1_ick@c10 ti,omap3-interface-clockS gpio1_ick@c10 ti,omap3-interface-clockS omap_32ksync_ick@c10 ti,omap3-interface-clockS gpt12_ick@c10 ti,omap3-interface-clockS gpt1_ick@c10 ti,omap3-interface-clockS per_96m_fck fixed-factor-clock.per_48m_fck fixed-factor-clock5Tuart3_fck@1000 ti,wait-gate-clockT gpt2_gate_fck@1000 ti,composite-gate-clock#Ugpt2_mux_fck@1040 ti,composite-mux-clockE#@Vgpt2_fck ti,composite-clockUV gpt3_gate_fck@1000 ti,composite-gate-clock#Wgpt3_mux_fck@1040 ti,composite-mux-clockE#@Xgpt3_fck ti,composite-clockWXgpt4_gate_fck@1000 ti,composite-gate-clock#Ygpt4_mux_fck@1040 ti,composite-mux-clockE#@Zgpt4_fck ti,composite-clockYZgpt5_gate_fck@1000 ti,composite-gate-clock#[gpt5_mux_fck@1040 ti,composite-mux-clockE#@\gpt5_fck ti,composite-clock[\gpt6_gate_fck@1000 ti,composite-gate-clock#]gpt6_mux_fck@1040 ti,composite-mux-clockE#@^gpt6_fck ti,composite-clock]^gpt7_gate_fck@1000 ti,composite-gate-clock#_gpt7_mux_fck@1040 ti,composite-mux-clockE#@`gpt7_fck ti,composite-clock_`gpt8_gate_fck@1000 ti,composite-gate-clock# agpt8_mux_fck@1040 ti,composite-mux-clockE#@bgpt8_fck ti,composite-clockabgpt9_gate_fck@1000 ti,composite-gate-clock# cgpt9_mux_fck@1040 ti,composite-mux-clockE#@dgpt9_fck ti,composite-clockcdper_32k_alwon_fck fixed-factor-clockEegpio6_dbck@1000 ti,gate-clockegpio5_dbck@1000 ti,gate-clockegpio4_dbck@1000 ti,gate-clockegpio3_dbck@1000 ti,gate-clockegpio2_dbck@1000 ti,gate-clocke wdt3_fck@1000 ti,wait-gate-clocke per_l4_ick fixed-factor-clockDfgpio6_ick@1010 ti,omap3-interface-clockfgpio5_ick@1010 ti,omap3-interface-clockfgpio4_ick@1010 ti,omap3-interface-clockfgpio3_ick@1010 ti,omap3-interface-clockfgpio2_ick@1010 ti,omap3-interface-clockf wdt3_ick@1010 ti,omap3-interface-clockf uart3_ick@1010 ti,omap3-interface-clockf uart4_ick@1010 ti,omap3-interface-clockfgpt9_ick@1010 ti,omap3-interface-clockf gpt8_ick@1010 ti,omap3-interface-clockf gpt7_ick@1010 ti,omap3-interface-clockfgpt6_ick@1010 ti,omap3-interface-clockfgpt5_ick@1010 ti,omap3-interface-clockfgpt4_ick@1010 ti,omap3-interface-clockfgpt3_ick@1010 ti,omap3-interface-clockfgpt2_ick@1010 ti,omap3-interface-clockfmcbsp2_ick@1010 ti,omap3-interface-clockfmcbsp3_ick@1010 ti,omap3-interface-clockfmcbsp4_ick@1010 ti,omap3-interface-clockfmcbsp2_gate_fck@1000 ti,composite-gate-clock mcbsp3_gate_fck@1000 ti,composite-gate-clock mcbsp4_gate_fck@1000 ti,composite-gate-clock emu_src_mux_ck@1140  ti,mux-clock#ghi@jemu_src_ck ti,clkdm-gate-clockjkpclk_fck@1140 ti,divider-clockku@pclkx2_fck@1140 ti,divider-clockku@atclk_fck@1140 ti,divider-clockku@traceclk_src_fck@1140  ti,mux-clock#ghi@ltraceclk_fck@1140 ti,divider-clockl u@secure_32k_fck  fixed-clockemgpt12_fck fixed-factor-clockm wdt1_fck fixed-factor-clockmsecurity_l4_ick2 fixed-factor-clockDnaes1_ick@a14 ti,omap3-interface-clockn rng_ick@a14 ti,omap3-interface-clockn sha11_ick@a14 ti,omap3-interface-clockn des1_ick@a14 ti,omap3-interface-clockn cam_mclk@f00 ti,gate-clockocam_ick@f10 !ti,omap3-no-wait-interface-clockDcsi2_96m_fck@f00 ti,gate-clocksecurity_l3_ick fixed-factor-clockCppka_ick@a14 ti,omap3-interface-clockp icr_ick@a10 ti,omap3-interface-clockO des2_ick@a10 ti,omap3-interface-clockO mspro_ick@a10 ti,omap3-interface-clockO mailboxes_ick@a10 ti,omap3-interface-clockO ssi_l4_ick fixed-factor-clockDwsr1_fck@c00 ti,wait-gate-clock# sr2_fck@c00 ti,wait-gate-clock# sr_l4_ick fixed-factor-clockDdpll2_fck@40 ti,divider-clock+u@qdpll2_ck@4 ti,omap3-dpll-clock#q$@4 rdpll2_m2_ck@44 ti,divider-clockruDsiva2_ck@0 ti,wait-gate-clocksmodem_fck@a00 ti,omap3-interface-clock# sad2d_ick@a10 ti,omap3-interface-clockC mad2d_ick@a18 ti,omap3-interface-clockC mspro_fck@a00 ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00  ti,composite-no-wait-gate-clock$ tssi_ssr_div_fck_3430es2@a40 ti,composite-divider-clock$ @$4ussi_ssr_fck_3430es2 ti,composite-clocktuvssi_sst_fck_3430es2 fixed-factor-clockvhsotgusb_ick_3430es2@a10 "ti,omap3-hsotgusb-interface-clockN ssi_ick_3430es2@a10 ti,omap3-ssi-interface-clockw usim_gate_fck@c00 ti,composite-gate-clockJ  sys_d2_ck fixed-factor-clock#yomap_96m_d2_fck fixed-factor-clockJzomap_96m_d4_fck fixed-factor-clockJ{omap_96m_d8_fck fixed-factor-clockJ|omap_96m_d10_fck fixed-factor-clockJ }dpll5_m2_d4_ck fixed-factor-clockx~dpll5_m2_d8_ck fixed-factor-clockxdpll5_m2_d16_ck fixed-factor-clockxdpll5_m2_d20_ck fixed-factor-clockxusim_mux_fck@c40 ti,composite-mux-clock(#yz{|}~ @usim_fck ti,composite-clockusim_ick@c10 ti,omap3-interface-clockS  dpll5_ck@d04 ti,omap3-dpll-clock##  $ L 4dpll5_m2_ck@d50 ti,divider-clocku Pxsgx_gate_fck@b00 ti,composite-gate-clock+ core_d3_ck fixed-factor-clock+core_d4_ck fixed-factor-clock+core_d6_ck fixed-factor-clock+omap_192m_alwon_fck fixed-factor-clock'core_d2_ck fixed-factor-clock+sgx_mux_fck@b40 ti,composite-mux-clock / @sgx_fck ti,composite-clocksgx_ick@b10 ti,wait-gate-clockC cpefuse_fck@a08 ti,gate-clock# ts_fck@a08 ti,gate-clockE usbtll_fck@a08 ti,wait-gate-clockx usbtll_ick@a18 ti,omap3-interface-clockO mmchs3_ick@a10 ti,omap3-interface-clockO mmchs3_fck@a00 ti,wait-gate-clock dss1_alwon_fck_3430es2@e00 ti,dss-gate-clockdss_ick_3430es2@e10 ti,omap3-dss-interface-clockDusbhost_120m_fck@1400 ti,gate-clockxusbhost_48m_fck@1400 ti,dss-gate-clock5usbhost_ick@1410 ti,omap3-dss-interface-clockDuart4_fck@1000 ti,wait-gate-clockTclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainkdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainrd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 $revsysc;Rfckick+ !H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH7H target-module@48056000ti,sysc-omap2ti,syscH`H`,H`($revsyscsyss.# @ ;INick+ !H`dma-controller@0ti,omap3630-sdmati,omap-sdma NY f`gpio@48310000ti,omap3-gpioH1 gpio1sH7defaultgpio@49050000ti,omap3-gpioI gpio2H7gpio@49052000ti,omap3-gpioI  gpio3H7gpio@49054000ti,omap3-gpioI@ gpio4H72gpio@49056000ti,omap3-gpioI` !gpio5H7irda_engpio@49058000ti,omap3-gpioI "gpio6H7serial@4806a000ti,omap3-uartH HV12[txrxuart1eldefaultserial@4806c000ti,omap3-uartHIV34[txrxuart2eldefaultgnsswi2wi,w2sg0004default serial@49020000ti,omap3-uartIJnV56[txrxuart3eldefaulti2c@48070000 ti,omap3-i2cH 8V[txrx+i2c1e'@twl@48H  fck ti,twl4030H7defaultaudioti,twl4030-audiocodecpowerti,twl4030-powerrtcti,twl4030-rtc bciti,twl4030-bci +9 EvacV0bwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1&%-regulator-vaux2ti,twl4030-vaux2**mregulator-vaux3ti,twl4030-vaux3&%&%regulator-vaux4ti,twl4030-vaux4*0regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@mregulator-vsimti,twl4030-vsim*0gpioti,twl4030-gpioH7!twl4030-usbti,twl4030-usb pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbutton keypadti,twl4030-keypad  disabledmadcti,twl4030-madc  i2c@48072000 ti,omap3-i2cH  9V[txrx+i2c2etca6507@45 ti,tca6507+Ered_aux@0gta04:red:auxgreen_aux@1gta04:green:auxred_power@3gta04:red:power $default-ongreen_power@4gta04:green:powerwifi_reset@6gpiotsc2007@48 ti,tsc2007Hdefault   :XJ]p m24lr64@50 atmel,24c64Pbmg160@69 bosch,bmg160ibmc150@10bosch,bmc150_accelbmc150@12bosch,bmc150_magnbme280@76 bosch,bme280vi2c@48060000 ti,omap3-i2cH =V[txrx+i2c3emailbox@48094000ti,omap3-mailboxmailboxH @ dsp  spi@48098000ti,omap2-mcspiH  A+mcspi1&@V#$%&'()* [tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH  B+mcspi2& V+,-.[tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH  [+mcspi3& V[tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH  0+mcspi4&VFG[tx0rx01w@480b2000 ti,omap3-1wH  :hdq1wdefaultmmc@4809c000ti,omap3-hsmmcH  Smmc14V=>[txrxAdefaultNZdummc@480b4000ti,omap3-hsmmcH @ Vmmc2V/0[txrxNZdgdefault+wlcore@2 ti,wl1837  mmc@480ad000ti,omap3-hsmmcH  ^mmc3VMN[txrx disabledmmu@480bd400ti,omap2-iommuH  mmu_ispmmu@5d000000ti,omap2-iommu] mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@$mpu  ;< commontxrxmcbsp1V [txrxfckokaydefaulttarget-module@480a0000ti,sysc-omap2ti,syscH <H @H D$revsyscsyss.;Iick+ !H rng@0 ti,omap2-rng  4mcbsp@49022000ti,omap3-mcbspI I $mpusidetone >?commontxrxsidetonemcbsp2mcbsp2_sidetoneV!"[txrxfckickokaydefault mcbsp@49024000ti,omap3-mcbspI@I $mpusidetone YZcommontxrxsidetonemcbsp3mcbsp3_sidetoneV[txrxfckickokaydefaultmcbsp@49026000ti,omap3-mcbspI`$mpu  67 commontxrxmcbsp4V[txrxfckokaydefault#mcbsp@48096000ti,omap3-mcbspH `$mpu  QR commontxrxmcbsp5V[txrx fck disabledsham@480c3000ti,omap3-shamshamH 0d 1VE[rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1$revsyscsyss.' ;I fckick+ !H1timer@0ti,omap3430-timer fck %! 1Etarget-module@49032000ti,sysc-omap2-timerti,syscI I I $revsyscsyss.' ;I fckick+ !I timer@0ti,omap3430-timer &timer@49034000ti,omap3430-timerI@ 'timer3timer@49036000ti,omap3430-timerI` (timer4timer@49038000ti,omap3430-timerI )timer5Htimer@4903a000ti,omap3430-timerI *timer6Htimer@4903c000ti,omap3430-timerI +timer7Htimer@4903e000ti,omap3430-timerI ,timer8UHtimer@49040000ti,omap3430-timerI -timer9Utimer@48086000ti,omap3430-timerH` .timer10Utimer@48088000ti,omap3430-timerH /timer11U*target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@$revsyscsyss.' ;I fckick+ !H0@timer@0ti,omap3430-timer _busbhstll@48062000 ti,usbhs-tllH  N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+! rehci-phyohci@48064400ti,ohci-omap3HD L}ehci@48064800 ti,ehci-omapHH M gpmc@6e000000ti,omap3430-gpmcgpmcn V[rxtx+H7!defaultonenand@0,0+ti,omap2-onenand  ,>LW^Wp  WWpp Q  * A [ s  Q :x-loader@0 X-Loaderbootloaders@80000U-Bootbootloaders_env@240000 U-Boot Env$kernel@280000Kernel(`filesystem@880000 File Systemusb_otg_hs@480ab000ti,omap3-musbH  \]mcdma usb_otg_hs      usb2-phy 2dss@48050000 ti,omap3-dssHokay dss_corefck+!default dispc@48050400ti,omap3-dispcH  dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H $protophypll  disabled dss_dsi1 fcksys_clk+encoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH okay dss_vencfcktv_dac_clk portendpoint $ 4 @,portendpoint $ S'ssi-controller@48058000 ti,omap3-ssissiokayHH$sysgdd Ggdd_mpu+! v ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHH$txrx CDssi-port@4805b000ti,omap3-ssi-portHH$txrx EFserial@49042000ti,omap3-uartI  PVQR[txrxuart4elregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0h$base-addressint-address ^# w ` sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+(7H]{defaultpinmux_hsusb2_2_pins0PRT V X Z spi_gpio_pinmux 8FHD%isp@480bc000 ti,omap3-ispH H     ports+port@0endpoint  Z     bandgap@48002524H%$ti,omap36xx-bandgap target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8$sysc. ;fck+ !H smartreflex@0ti,omap3-smartreflex-core target-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8$sysc. ;fck+ !H smartreflex@480c9000ti,omap3-smartreflex-mpu-iva target-module@50000000ti,sysc-omap4ti,syscPP $revsysc @ ;fckick+ !Popp-tableoperating-points-v2-ti-cpuopp50-300000000 . 5ssssss C Topp100-600000000 .#F 5OOOOOO Copp130-800000000 ./ 5777777 Copp1g-1000000000 .; 5 C `opp_supplyti,omap-opp-supply kthermal-zonescpu_thermal   N  tripscpu_alert 8 passivecpu_crit _  criticalcooling-mapsmap0  memory@80000000memory fixedregulatorregulator-fixedldo_3v32Z2Zmoscillator  fixed-clockegpio-keys gpio-keysaux-buttonaux   antenna-detect gpio-keysgps-antenna-button GPS_EXT_ANT        soundti,omap-twl4030 .gta04 7  @!sound_telephonysimple-audio-card QGTA04 voice h" " i2s  simple-audio-card,cpu #simple-audio-card,codec $"gsm_codecoption,gtm601$spi_lcd spi-gpio+default%    & 0 9td028ttec1@0tpo,td028ttec1 I [ d m&lcdportendpoint $'backlightpwm-backlight w( |backlight, (2<FPZd default)&dmtimer-pwmti,omap-dmtimer-pwm * (hsusb2_phyusb-nop-xceiv  connectorcomposite-video-connectortvportendpoint $+-opa362 ti,opa362 ports+port@0endpoint $,port@1endpoint $-+wifi_pwrseqmmc-pwrseq-simplepinmux_mcbsp1@48002274pinctrl-singleH"t+ ] {(default.pinmux_mcbsp1_devconf0_pins .pinmux_tv_out@480022d8pinctrl-singleH"+ ] {(default/pinmux_tv_acbias_devconf1_pins /wlan_en_regulatorregulator-fixeddefault0wlan-en-regulatorw@w@ L p$pps pps-gpiodefault1 2 compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-highinterrupts-extendedsirf,onoff-gpioslna-supplyvcc-supplyti,enable-vibrati,ramp_delay_valueti,use_poweroffbci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnsstatus#io-channel-cellslabellinux,default-triggerti,x-plate-ohmstouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressuretouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-inverted-y#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthti,non-removablebroken-cdcap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-readgpmc,burst-wrapgpmc,burst-writegpmc,device-widthgpmc,mux-add-datagpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsgpmc,sync-clk-psmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyremote-endpointti,channelsti,invert-polaritydata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-typeti,isp-clock-divisorti,strobe-modedata-shifthsync-activevsync-activedata-activepclk-sample#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelinux,codewakeup-sourcelinux,input-typedebounce-intervalti,modelti,mcbspti,jack-det-gpiosimple-audio-card,namesimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,formatsimple-audio-card,bitclock-inversionsimple-audio-card,frame-inversionsound-daigpio-sckgpio-misogpio-mosics-gpiosnum-chipselectsspi-max-frequencyspi-cpolspi-cphabacklightpwmspwm-namesbrightness-levelsdefault-brightness-levelti,timersti,clock-sourcereset-gpiosenable-gpiospinctrl-single,bit-per-muxpinctrl-single,bitsstartup-delay-usenable-active-high