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#�default�N5_�pwm �disabledpwm@ff680030rockchip,rk3288-pwm��h0#�default�O5_�pwm �disabledsram@ff700000 mmio-sram��p���p�smp-sram@0rockchip,rk3066-smp-sram�sram@ff720000#rockchip,rk3288-pmu-srammmio-sram��rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd��sbpower-controller!rockchip,rk3288-power-controller.�h� bapower-domain@9� �5��������������chgfdehilkj$BPQRSTUVWXpower-domain@11� 5�opBYZpower-domain@12� 5��B[power-domain@13� 5�B\]reboot-modesyscon-reboot-modeI�PRB�\RB�jRB� zRB�syscon@ff740000rockchip,rk3288-sgrfsyscon��tclock-controller@ff760000rockchip,rk3288-cru��v6<�H���j��k$�#g��ׄ�e��рxh���рxh�bsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd��wb<edp-phyrockchip,rk3288-dp-phy5h�24m� �disabledbqio-domains"rockchip,rk3288-io-voltage-domain�okay��usbphyrockchip,rk3288-usb-phy�okayusb-phy@320�� 5]�phyclk�� kphy-resetbCusb-phy@334��45^�phyclk�� kphy-resetbAusb-phy@348��H5_�phyclk�� kphy-resetbBwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt���5p �O�okaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif����5T� �mclkhclk�^�tx �6�default�_6< �disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s���� �55R��i2s_clki2s_hclk�^^�txrx�default�`���okayb�crypto@ff8a0000rockchip,rk3288-crypto���@ �0 5��}��aclkhclksclkapb_pclk�� kcrypto-rst�okayiommu@ff900800rockchip,iommu���@ ��iep_mmu5�� �aclkiface �disablediommu@ff914000rockchip,iommu ���@��P ��isp_mmu5�� �aclkiface  �disabledrga@ff920000rockchip,rk3288-rga���� �5��j�aclkhclksclk;a �ilm kcoreaxiahbvop@ff930000rockchip,rk3288-vop ������ �5����aclk_vopdclk_vophclk_vop;a �def kaxiahbdclkIb�okayportb endpoint@0�Pcbvendpoint@1�Pdbrendpoint@2�Peblendpoint@3�Pfboiommu@ff930300rockchip,iommu��� � �vopb_mmu5�� �aclkiface;a �okaybbvop@ff940000rockchip,rk3288-vop ������ �5����aclk_vopdclk_vophclk_vop;a ���� kaxiahbdclkIg�okayportb endpoint@0�Phbwendpoint@1�Pibsendpoint@2�Pjbmendpoint@3�Pkbpiommu@ff940300rockchip,iommu��� � �vopl_mmu5�� �aclkiface;a �okaybgmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi���@ �5~d �refpclk;a 6< �disabledportsportendpoint@0�Plbeendpoint@1�Pmbjlvds@ff96c000rockchip,rk3288-lvds����@5g �pclk_lvds�lcdc�n;a 6< �disabledportsport@0�endpoint@0�Pobfendpoint@1�Ppbkdp@ff970000rockchip,rk3288-dp���@ �b5ic�dppclk1q6dp�okdp6< �disabledportsport@0�endpoint@0�Prbdendpoint@1�Psbihdmi@ff980000rockchip,rk3288-dw-hdmi�����6< �g5hmn�iahbisfrcec;a �okay`t�default�ub�portsportendpoint@0�Pvbcendpoint@1�Pwbhvideo-codec@ff9a0000rockchip,rk3288-vpu����   �vepuvdpu5�� �aclkhclkIx;a iommu@ff9a0800rockchip,iommu��� � �vpu_mmu5�� �aclkiface;a bxiommu@ff9c0440rockchip,iommu ���@@���@ �o �hevc_mmu5�� �aclkiface �disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760���$� �jobmmugpu5�y;a �okaylzb9gpu-opp-tableoperating-points-v2byopp-100000000u��|~�opp-200000000u ��|~�opp-300000000u�|B@opp-400000000uׄ|��opp-600000000u#�F|�qos@ffaa0000syscon��� b\qos@ffaa0080syscon���� b]qos@ffad0000syscon��� bQqos@ffad0100syscon��� bRqos@ffad0180syscon���� bSqos@ffad0400syscon��� bTqos@ffad0480syscon���� bUqos@ffad0500syscon��� bPqos@ffad0800syscon��� bVqos@ffad0880syscon���� bWqos@ffad0900syscon��� bXqos@ffae0000syscon��� b[qos@ffaf0000syscon��� bYqos@ffaf0080syscon���� bZefuse@ffb40000rockchip,rk3288-efuse��� 5q �pclk_efusecpu-id@7�cpu_leakage@17�interrupt-controller@ffc01000 arm,gic-400x�@����� ��@ ��`  � bpinctrlrockchip,rk3288-pinctrl6<��gpio0@ff750000rockchip,gpio-bank��u �Q5@��x�bEgpio1@ff780000rockchip,gpio-bank��x �R5A��x�b�gpio2@ff790000rockchip,gpio-bank��y �S5B��x�gpio3@ff7a0000rockchip,gpio-bank��z �T5C��x�gpio4@ff7b0000rockchip,gpio-bank��{ �U5D��x�b@gpio5@ff7c0000rockchip,gpio-bank��| �V5E��x�gpio6@ff7d0000rockchip,gpio-bank��} �W5F��x�gpio7@ff7e0000rockchip,gpio-bank��~ �X5G��x�b�gpio8@ff7f0000rockchip,gpio-bank�� �Y5H��x�hdmihdmi-cec-c0�{buhdmi-cec-c7�{hdmi-ddc �{{hdmi-ddc-unwedge �|{pcfg-output-low�b|pcfg-pull-up�b}pcfg-pull-down�b~pcfg-pull-none�b{pcfg-pull-none-12ma�� b�suspendglobal-pwroff�{bGddrio-pwroff�{ddr0-retention�}ddr1-retention�}edpedp-hpd� ~i2c0i2c0-xfer �{{bDi2c1i2c1-xfer �{{b,i2c2i2c2-xfer � { {bKi2c3i2c3-xfer �{{b-i2c4i2c4-xfer �{{b.i2c5i2c5-xfer �{{b/i2s0i2s0-bus`�{{{{{{b`lcdclcdc-ctl@�{{{{bnsdmmcsdmmc-clk�b sdmmc-cmd��bsdmmc-cd�}bsdmmc-bus1�}sdmmc-bus4@�����bsdmmc-pwr� {b�sdio0sdio0-bus1�}sdio0-bus4@�}}}}bsdio0-cmd�}bsdio0-clk�{bsdio0-cd�}sdio0-wp�}sdio0-pwr�}sdio0-bkpwr�}sdio0-int�}bsdio1sdio1-bus1�}sdio1-bus4@�}}}}sdio1-cd�}sdio1-wp�}sdio1-bkpwr�}sdio1-int�}sdio1-cmd�}sdio1-clk�{sdio1-pwr� }emmcemmc-clk�{bemmc-cmd�}bemmc-pwr� }bemmc-bus1�}emmc-bus4@�}}}}emmc-bus8��}}}}}}}}bspi0spi0-clk� }b spi0-cs0� }b#spi0-tx�}b!spi0-rx�}b"spi0-cs1�}spi1spi1-clk� }b$spi1-cs0� }b'spi1-rx�}b&spi1-tx�}b%spi2spi2-cs1�}spi2-clk�}b(spi2-cs0�}b+spi2-rx�}b*spi2-tx� }b)uart0uart0-xfer �}{b0uart0-cts�}uart0-rts�{uart1uart1-xfer �} {b1uart1-cts� }uart1-rts� {uart2uart2-xfer �}{b2uart3uart3-xfer �}{b3uart3-cts� }uart3-rts� {uart4uart4-xfer �}{b4uart4-cts� }uart4-rts� {tsadcotp-pin� {b:otp-out� {b;pwm0pwm0-pin�{bLpwm1pwm1-pin�{bMpwm2pwm2-pin�{bNpwm3pwm3-pin�{bOgmacrgmii-pins��{{{{����{{{ ��{{b?rmii-pins��{{{{{{{{{{spdifspdif-tx� {b_pcfg-pull-none-drv-8ma�bpcfg-pull-up-drv-8ma��b�backlightbl-en�{buttonspwrbtn�}b�eth_phyeth-phy-pwr�{pmicpmic-int�}bFdvs-1� ~bHdvs-2� ~bIusbhost-vbus-drv�{pwr-3g�{sdiowifi-enable �{{b�chosen serial2:115200n8memory���memoryexternal-gmac-clock fixed-clock�sY@ �ext_gmacb=gpio-keys gpio-keys �default��button@0 �E "t -GPIO Key Power 3� Ddgpio-leds gpio-ledsled-0 �� Vmmc0led-1 �� Vheartbeatled-2 �E Vdefault-onsdio-pwrseqmmc-pwrseq-simple5� �ext_clock�default�� l@@bsoundsimple-audio-card xi2s �rockchip,tinker-codec �simple-audio-card,codec ��simple-audio-card,cpu ��vsys-regulatorregulator-fixed�vcc_sys�LK@�LK@\pbJsdmmc-regulatorregulator-fixed �� �default���vcc_sd�2Z��2Z� ��� � #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50mmc-hs200-1_8vmmc-ddr-1_8v#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggerreset-gpiossimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply