� ��Y�8T�(Tt!,rikomagic,mk808rockchip,rk3066a7Rikomagic MK808aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/mmc@1021c000f/mmc@10214000l/mmc@10218000r/serial@10124000z/serial@10126000�/serial@20064000�/serial@20068000�/spi@20070000�/spi@20074000bus ,simple-bus�dma-controller@20018000,arm,pl330arm,primecell� �@������ �apb_pclkdma-controller@2001c000,arm,pl330arm,primecell� �@������ �apb_pclk  disableddma-controller@20078000,arm,pl330arm,primecell� �@������ �apb_pclk oscillator ,fixed-clockn6!.xin24mgpu@10090000",rockchip,rk3066-maliarm,mali-400� ��� �buscoreA�Q��fx  disabledx�5mgpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3}cache-controller@10138000,arm,pl310-cache����/scu@1013c000,arm,cortex-a9-scu��global-timer@1013c200,arm,cortex-a9-global-timer��  � �local-timer@1013c600,arm,cortex-a9-twd-timer��  � �interrupt-controller@1013d000,arm,cortex-a9-gic�����serial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uart�@ �"���baudclkapb_pclk�@L  disabled��txrx�default�serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uart�` �#���baudclkapb_pclk�AM  disabled��txrx�default�qos@1012d000,syscon�� qos@1012e000,syscon�� qos@1012f000,syscon�� qos@1012f080,syscon��� qos@1012f100,syscon�� qos@1012f180,syscon�� qos@1012f200,syscon�� qos@1012f280,syscon�� usb@10180000,rockchip,rk3066-usbsnps,dwc2� ����otg otg#2��@@ A Fusb2-phy okayusb@101c0000 ,snps,dwc2� ����otg hostA Fusb2-phy okayethernet@10204000,rockchip,rk3066-emac� @< �P ��D �hclkmacref]dgrmii  disabledmmc@10214000,rockchip,rk2928-dw-mshc�!@ ���H�biuciu� �rx-txpfQ{reset okay��������default� ����mmc@10218000,rockchip,rk2928-dw-mshc�!� ���I�biuciu� �rx-txpfR{reset okay�default ����mmc@1021c000,rockchip,rk2928-dw-mshc�!� ���J�biuciu� �rx-txpfS{reset  disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd� @reboot-mode,syscon-reboot-mode�@�RB��RB��RB�  RB�power-controller!,rockchip,rk3066-power-controllerpower-domain@7���������P��O�������-power-domain@6� �����-power-domain@8���-grf@20008000,syscon� � i2c@2002d000,rockchip,rk3066-i2c� � �(P �i2c�P  disabled�default�i2c@2002f000,rockchip,rk3066-i2c� � �)P �Q�i2c  disabled�default�pwm@20030000,rockchip,rk2928-pwm� 4�F  disabled�default�pwm@20030010,rockchip,rk2928-pwm� 4�F  disabled�default�watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt� ��K �3 okaypwm@20050020,rockchip,rk2928-pwm�  4�G  disabled�default� pwm@20050030,rockchip,rk2928-pwm� 04�G  disabled�default�!i2c@20056000,rockchip,rk3066-i2c� ` �*P �R�i2c  disabled�default�"i2c@2005a000,rockchip,rk3066-i2c� � �+P �S�i2c  disabled�default�#i2c@2005e000,rockchip,rk3066-i2c� � �4P �T�i2c  disabled�default�$serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uart� @ �$���baudclkapb_pclk�BN okay�  �txrx�default�%serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uart� � �%���baudclkapb_pclk�CO  disabled�  �txrx�default�&saradc@2006c000,rockchip,saradc� � �?�GJ�saradcapb_pclkfW {saradc-apb  disabledspi@20070000,rockchip,rk3066-spi�EH�spiclkapb_pclk �&� � �txrx  disabled�default�'()*spi@20074000,rockchip,rk3066-spi�FI�spiclkapb_pclk �'� @� �txrx  disabled�default�+,-.cpusQrockchip,rk3066-smpcpu@0_cpu,arm,cortex-a9k/�8|�@� O���a�*� s�*� '���������g8��@�cpu@1_cpu,arm,cortex-a9k/�display-subsystem,rockchip,display-subsystem�01sram@10080000 ,mmio-sram� �smp-sram@0,rockchip,rk3066-smp-sram�Pvop@1010c000,rockchip,rk3066-vop��� � �����aclk_vopdclk_vophclk_vop}fdef {axiahbdclk okayport0endpoint@0��26vop@1010e000,rockchip,rk3066-vop��� ������aclk_vopdclk_vophclk_vop}fghi {axiahbdclk  disabledport1endpoint@0��37hdmi@10116000,rockchip,rk3066-hdmi�`  �@���hclk�default�45}P  okayportsport@0�endpoint@0��62endpoint@1��7  disabled3port@1�endpoint�8?i2s@10118000,rockchip,rk3066-i2s��  ��default�9�K��i2s_clki2s_hclk��txrx���  disabledi2s@1011a000,rockchip,rk3066-i2s��  � �default�:�L��i2s_clki2s_hclk��txrx���  disabledi2s@1011c000,rockchip,rk3066-i2s��  ��default�;�M��i2s_clki2s_hclk�  �txrx���  disabledclock-controller@20000000,rockchip,rk3066a-cru� P !�@A��^��_ Qׄ#g����рxh���рxh�timer@2000e000,snps,dw-apb-timer-osc� � �.�VD �timerpclkefuse@20010000,rockchip,rk3066a-efuse� @�[ �pclk_efusecpu_leakage@17�timer@20038000,snps,dw-apb-timer-osc� � �,�TB �timerpclktimer@2003a000,snps,dw-apb-timer-osc� � �-�UC �timerpclktsadc@20060000,rockchip,rk3066-tsadc� �]]�saradcapb_pclk �?f\ {saradc-apb  disabledphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phyP  okayusb-phy@17c�|�Q�phyclk!usb-phy@188���R�phyclk!pinctrl,rockchip,rk3066a-pinctrlP �gpio0@20034000,rockchip,gpio-bank� @ �6�U��>gpio1@2003c000,rockchip,gpio-bank� � �7�V��gpio2@2003e000,rockchip,gpio-bank� � �8�W��gpio3@20080000,rockchip,gpio-bank�  �9�X��Cgpio4@20084000,rockchip,gpio-bank� @ �:�Y��gpio6@2000a000,rockchip,gpio-bank� � �<�Z��pcfg_pull_default+=pcfg_pull_noneA<emacemac-xfer�N<<<<<<<<emac-mdio N<<emmcemmc-clkN=emmc-cmdN =emmc-rstN =hdmihdmi-hpdN=5hdmii2c-xfer N<<4i2c0i2c0-xfer N<<i2c1i2c1-xfer N<<i2c2i2c2-xfer N<<"i2c3i2c3-xfer N<<#i2c4i2c4-xfer N<<$pwm0pwm0-outN<pwm1pwm1-outN<pwm2pwm2-outN< pwm3pwm3-outN<!spi0spi0-clkN='spi0-cs0N=*spi0-txN=(spi0-rxN=)spi0-cs1N=spi1spi1-clkN=+spi1-cs0N=.spi1-rxN=-spi1-txN=,spi1-cs1N=uart0uart0-xfer N==uart0-ctsN=uart0-rtsN=uart1uart1-xfer N==uart1-ctsN=uart1-rtsN=uart2uart2-xfer N= =%uart3uart3-xfer N==&uart3-ctsN=uart3-rtsN=sd0sd0-clkN= sd0-cmdN = sd0-cdN= sd0-wpN=sd0-bus-width1N =sd0-bus-width4@N = = = =sd1sd1-clkN=sd1-cmdN=sd1-cdN=sd1-wpN=sd1-bus-width1N=sd1-bus-width4@N====i2s0i2s0-bus�N== = = = = ===9i2s1i2s1-bus`N======:i2s2i2s2-bus`N======;usb-hosthost-drvN=@usb-otgotg-drvN=Bsdmmcsdmmc-pwrN=Dsdiowifi-pwrN<Echosen\serial2:115200n8memory@60000000�`@_memorygpio-leds ,gpio-ledsled-0hmk808:blue:power n>toff �default-onhdmi_con,hdmi-connectorfcportendpoint�?8vcc-io,regulator-fixed�vcc_io�2Z��2Z�Ausb-host-regulator,regulator-fixed� �>�@�default� �host-pwr�LK@�LK@��Ausb-otg-regulator,regulator-fixed� �>�B�default��vcc_otg�LK@�LK@��Asdmmc-regulator,regulator-fixed �C�D�default�vcc_sd�2Z��2Z���Asdio-regulator,regulator-fixed� �C�E�default �vcc_wifi�2Z��2Z���A #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1rangesreginterrupts#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclocksclock-namesphandlestatusclock-frequency#clock-cellsclock-output-namesassigned-clocksassigned-clock-ratesresetsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modefifo-depthreset-namesmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeedvmmc-supplynon-removableoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencyportsremote-endpointrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cells#phy-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsstdout-pathlabelgpiosdefault-statelinux,default-triggerregulator-nameregulator-min-microvoltregulator-max-microvoltenable-active-highgpioregulator-always-onstartup-delay-usvin-supply