|8( t.firefly,firefly-rk3288-reloadrockchip,rk3288&7Firefly-RK3288-reloadchosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEWKWreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @okay",>Oalvdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay">alvdefaultdwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay",alvdefaultsaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW /saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk;  @txrx ,vdefault !"# disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk; @txrx -vdefault$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk;@txrx .vdefault()*+ disabledi2c@ff140000rockchip,rk3288-i2c >i2c2Mvdefault, disabledi2c@ff150000rockchip,rk3288-i2c ?i2c2Ovdefault- disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pvdefault. disabledi2c@ff170000rockchip,rk3288-i2c Ai2c2Qvdefault/ disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7JT2MUbaudclkapb_pclkvdefault 012okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8JT2NVbaudclkapb_pclkvdefault3okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9JT2OWbaudclkapb_pclkvdefault4okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :JT2PXbaudclkapb_pclkvdefault5okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;JT2QYbaudclkapb_pclkvdefault6 disabledthermal-zonesreserve_thermalaw7cpu_thermaladw7tripscpu_alert0ppassiveE8K8cpu_alert1$passiveE9K9cpu_crit_ criticalcooling-mapsmap08 map19 gpu_thermaladw7tripsgpu_alert0ppassiveE:K:gpu_crit_ criticalcooling-mapsmap0: tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk /tsadc-apbvinitdefaultsleep;<;sokayE7K7ethernet@ff290000rockchip,rk3288-gmac)3macirqeth_wake_irqC=82fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB /stmmacethokP`>winputvdefault?@ABCrgmii 'B@ D0usb@ff500000 generic-ehciP 2usbhostEusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghostF usb2-phyokayvdefaultGusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otgotg@@ ,H usb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2LvdefaultIokaysyr827@40silergy,syr8276@Svdd_cpub Pzp,@JEKsyr828@41silergy,syr8286ASvdd_gpub PzpJact8846@5aactive-semi,act8846ZvdefaultKL JJ"J-J8JDJPMregulatorsREG1Svcc_ddrbOzOREG2Svcc_iob2Zz2ZEKREG3Svdd_logbzREG4Svcc_20bzEMKMREG5 Svccio_sdb2Zz2ZEKREG6 Svdd10_lcdbB@zB@REG7Svcca_18bw@zw@REG8Svcca_33b2Zz2ZEQKQREG9 Svcca_lanb2Zz2ZECKCREG10Svdd_10bB@zB@REG11Svcc_18bw@zw@EKREG12 Svcc18_lcdbw@zw@hym8563@51haoyu,hym8563Qxin32k&NvdefaultOEwKwi2c@ff660000rockchip,rk3288-i2cf =i2c2NvdefaultPokayes8328@10everest,es8328\QhQtQQ2Ri2s_hclki2s_clkpwm@ff680000rockchip,rk3288-pwmhvdefaultR2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhvdefaultS2^pwm disabledpwm@ff680020rockchip,rk3288-pwmh vdefaultT2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0vdefaultU2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerPh` EZKZpd_vio@9 2chgfdehilkjpd_hevc@11 2oppd_video@12 2pd_gpu@13 2reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvC=HPjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE=K=edp-phyrockchip,rk3288-dp-phy2h24m  disabledEeKeio-domains"rockchip,rk3288-io-voltage-domainokay#-V8FCTbr~usbphyrockchip,rk3288-usb-phyokayusb-phy@320  2]phyclkEHKHusb-phy@334 42^phyclkEEKEusb-phy@348 H2_phyclkEFKFwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2T;W@tx 6vdefaultXC=okayEyKyi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5;WW@txrxi2s_hclki2s_clk2RvdefaultYokaycypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk /crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopZ def /axiahbdclk[okayportE K endpoint@0\EhKhendpoint@1]EfKfendpoint@2^EcKciommu@ff930300rockchip,iommu  3vopb_mmuZ okayE[K[vop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopZ  /axiahbdclk_okayportE K endpoint@0`EiKiendpoint@1aEgKgendpoint@2bEdKdiommu@ff940300rockchip,iommu  3vopl_mmuZ okayE_K_mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkZ C= disabledportsportendpoint@0cE^K^endpoint@1dEbKbdp@ff970000rockchip,rk3288-dp@ b2icdppclkedpo/dpC= disabledportsport@0endpoint@0fE]K]endpoint@1gEaKahdmi@ff980000rockchip,rk3288-dw-hdmiTC= g2hm iahbisfrZ  disabledportsportendpoint@0hE\K\endpoint@1iE`K`mali@ffa300004rockchip,rk3288-maliarm,mali-t760arm,mali-midgard$ 3jobmmugpu2jZ  disabledgpu-opp-tableoperating-points-v2EjKjopp@100000000$+~opp@200000000$ +~opp@300000000$+B@opp@400000000$ׄ+opp@500000000$e+Oopp@600000000$#F+interrupt-controller@ffc01000 arm,gic-4009N  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlC=Sgpio0@ff750000rockchip,gpio-banku Q2@_o9NErKrgpio1@ff780000rockchip,gpio-bankx R2A_o9Ngpio2@ff790000rockchip,gpio-banky S2B_o9Ngpio3@ff7a0000rockchip,gpio-bankz T2C_o9Ngpio4@ff7b0000rockchip,gpio-bank{ U2D_o9NEDKDgpio5@ff7c0000rockchip,gpio-bank| V2E_o9Ngpio6@ff7d0000rockchip,gpio-bank} W2F_o9Ngpio7@ff7e0000rockchip,gpio-bank~ X2G_o9NENKNgpio8@ff7f0000rockchip,gpio-bank Y2H_o9NEtKthdmihdmi-ddc {kkpcfg-pull-upElKlpcfg-pull-downEmKmpcfg-pull-noneEkKkpcfg-pull-none-12ma EnKnsleepglobal-pwroff{kddrio-pwroff{kddr0-retention{lddr1-retention{ledpedp-hpd{ mi2c0i2c0-xfer {kkEIKIi2c1i2c1-xfer {kkE,K,i2c2i2c2-xfer { k kEPKPi2c3i2c3-xfer {kkE-K-i2c4i2c4-xfer {kkE.K.i2c5i2c5-xfer {kkE/K/i2s0i2s0-bus`{kkkkkkEYKYsdmmcsdmmc-clk{nE K sdmmc-cmd{oE K sdmmc-cd{lEKsdmmc-bus1{lsdmmc-bus4@{ooooEKsdmmc-pwr{ kE|K|sdio0sdio0-bus1{lsdio0-bus4@{llllEKsdio0-cmd{lEKsdio0-clk{kEKsdio0-cd{lsdio0-wp{lsdio0-pwr{lsdio0-bkpwr{lsdio0-int{lEKsdio1sdio1-bus1{lsdio1-bus4@{llllsdio1-cd{lsdio1-wp{lsdio1-bkpwr{lsdio1-int{lsdio1-cmd{lsdio1-clk{ksdio1-pwr{ lemmcemmc-clk{kEKemmc-cmd{lEKemmc-pwr{ lEKemmc-bus1{lemmc-bus4@{llllemmc-bus8{llllllllEKspi0spi0-clk{ lE K spi0-cs0{ lE#K#spi0-tx{lE!K!spi0-rx{lE"K"spi0-cs1{lspi1spi1-clk{ lE$K$spi1-cs0{ lE'K'spi1-rx{lE&K&spi1-tx{lE%K%spi2spi2-cs1{lspi2-clk{lE(K(spi2-cs0{lE+K+spi2-rx{lE*K*spi2-tx{ lE)K)uart0uart0-xfer {lkE0K0uart0-cts{lE1K1uart0-rts{kE2K2uart1uart1-xfer {l kE3K3uart1-cts{ luart1-rts{ kuart2uart2-xfer {lkE4K4uart3uart3-xfer {lkE5K5uart3-cts{ luart3-rts{ kuart4uart4-xfer { l kE6K6uart4-cts{luart4-rts{ktsadcotp-gpio{ kE;K;otp-out{ kE<K<pwm0pwm0-pin{kERKRpwm1pwm1-pin{kESKSpwm2pwm2-pin{kETKTpwm3pwm3-pin{kEUKUgmacrgmii-pins{kkkknnnnkkk nnkkE?K?rmii-pins{kkkkkkkkkkphy-int{ lEBKBphy-pmeb{lEAKAphy-rst{pE@K@spdifspdif-tx{ kEXKXpcfg-output-highEpKppcfg-output-lowEqKqpcfg-pull-up-drv-12ma EoKoact8846pwr-hold{pELKLpmic-vsel{qEKKKirir-int{ldvpdvp-pwr{ kE~K~cif-pwr{ kEKhym8563rtc-int{lEOKOkeyspwr-key{lEsKsledspower-led{kEuKuwork-led{kEvKvsdiowifi-enable{kExKxusb_hosthost-vbus-drv{kE{K{usbhub-rst{pEGKGusb_otgotg-vbus-drv{ kE}K}external-gmac-clock fixed-clocksY@ ext_gmacE>K>flash-regulatorregulator-fixed Svcc_flashbw@zw@EKgpio-keys gpio-keyspower r GPIO Powertvdefaultsir-receivergpio-ir-receiver Nleds gpio-ledspower tfirefly:blue:powervdefaultuwork tfirefly:blue:user rc-feedbackvdefaultvsdio-pwrseqmmc-pwrseq-simple2w ext_clockvdefaultx #DEKsoundsimple-audio-card /SPDIFsimple-audio-card,dai-link@1cpu Fycodec Fzspdif-outlinux,spdif-ditEzKzusb-host-regulatorregulator-fixed P rvdefault{ Svcc_host_5vbLK@zLK@Jvsys-regulatorregulator-fixedSvcc_5vbLK@zLK@EJKJsdmmc-regulatorregulator-fixed N vdefault|Svcc_sdb2Zz2Z cEKusb-otg-regulatorregulator-fixed P r vdefault} Svcc_otg_5vbLK@zLK@Jdovdd-1v8-regulatorregulator-fixed P r vdefault~ Sdovdd_1v8bw@zw@EVKVvcc28-dvp-regulatorregulator-fixed P r vdefault~ Svcc28_dvpb*z*af_28-regulatorregulator-fixed P N vdefault Sdvdd_1v2bOzOwifi-regulatorregulator-fixedSvbat_wlb2Zz2ZEK #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50mmc-ddr-1_8vmmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyDVDD-supplyAVDD-supplyPVDD-supplyHPVDD-supply#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowwakeup-sourcegpioslabellinux,codepanic-indicatorlinux,default-triggerreset-gpiossimple-audio-card,namesound-daienable-active-highstartup-delay-us