S8OH(kO,Olimex A13-Olinuxino Micro/2olimex,a13-olinuxino-microallwinner,sun5i-a13chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0 c$, jdisabledaliasesq/soc@01c00000/serial@01c28400memoryymemorycpuscpu@0ycpu2arm,cortex-a8c0a\ p / OOO88clocks=dummy 2fixed-clock  clk@01c200502allwinner,sun4i-a10-osc-clkPn6osc24Mosc3M_clk2fixed-factor-clock#cosc3Mclk@0 2fixed-clockosc32k  clk@01c200002allwinner,sun4i-a10-pll1-clkcpll1  clk@01c200082allwinner,sun5i-a13-pll2-clkc pll2-1xpll2-2xpll2-4xpll2-8xclk@01c200102allwinner,sun4i-a10-pll3-clkcpll3  pll3x2_clk32allwinner,sun4i-a10-pll3-2x-clkfixed-factor-clock#c pll3-2xclk@01c200182allwinner,sun4i-a10-pll1-clkcpll4clk@01c200202allwinner,sun4i-a10-pll5-clk cpll5_ddrpll5_otherclk@01c200282allwinner,sun4i-a10-pll6-clk(cpll6_satapll6_otherpll6clk@01c200302allwinner,sun4i-a10-pll3-clk0cpll7  pll7x2_clk2fixed-factor-clock#c pll7-2xcpu@01c200542allwinner,sun4i-a10-cpu-clkTc  cpuaxi@01c200542allwinner,sun4i-a10-axi-clkTcaxiahb@01c200542allwinner,sun5i-a13-ahb-clkTcahb.>apb0@01c200542allwinner,sun4i-a10-apb0-clkTcapb0clk@01c200582allwinner,sun4i-a10-apb1-clkXc apb1clk@01c2005c"2allwinner,sun4i-a10-axi-gates-clk\cU axi_dramclk@01c200802allwinner,sun4i-a10-mod0-clkcnandclk@01c200842allwinner,sun4i-a10-mod0-clkcmsclk@01c200882allwinner,sun4i-a10-mmc-clkcmmc0mmc0_outputmmc0_sampleclk@01c2008c2allwinner,sun4i-a10-mmc-clkcmmc1mmc1_outputmmc1_sampleclk@01c200902allwinner,sun4i-a10-mmc-clkcmmc2mmc2_outputmmc2_sample  clk@01c200982allwinner,sun4i-a10-mod0-clkctsclk@01c2009c2allwinner,sun4i-a10-mod0-clkcssclk@01c200a02allwinner,sun4i-a10-mod0-clkcspi0clk@01c200a42allwinner,sun4i-a10-mod0-clkcspi1clk@01c200a82allwinner,sun4i-a10-mod0-clkcspi2((clk@01c200b02allwinner,sun4i-a10-mod0-clkcir0clk@01c200ccc2allwinner,sun5i-a13-usb-clkcusb_ohci0usb_phy##clk@01c201402allwinner,sun4i-a10-codec-clk@ccodec**clk@01c2015c2allwinner,sun5i-a13-mbus-clk\cmbusclk@01c20060"2allwinner,sun5i-a13-ahb-gates-clk`c\U  "$(,.34ahb_usbotgahb_ehciahb_ohciahb_ssahb_dmaahb_bistahb_mmc0ahb_mmc1ahb_mmc2ahb_nandahb_sdramahb_spi0ahb_spi1ahb_spi2ahb_stimerahb_veahb_tveahb_lcdahb_csiahb_de_beahb_de_feahb_iepahb_mali400clk@01c20068#2allwinner,sun5i-a13-apb0-gates-clkhc Uapb0_codecapb0_pioapb0_ir))clk@01c2006c#2allwinner,sun5i-a13-apb1-gates-clklcU4apb1_i2c0apb1_i2c1apb1_i2c2apb1_uart1apb1_uart3++clk@01c20100A2allwinner,sun5i-a13-dram-gates-clkallwinner,sun4i-a10-gates-clkcU9dram_vedram_csidram_de_fedram_de_bedram_acedram_iepclk@01c20104c 2allwinner,sun4i-a10-display-clkc de-beclk@01c2010cc 2allwinner,sun4i-a10-display-clk c de-fe22clk@01c20118c!2allwinner,sun4i-a10-tcon-ch0-clkc tcon-ch0-sclkclk@01c2012c!2allwinner,sun4i-a10-tcon-ch1-clk,c tcon-ch1-sclk00soc@01c00000 2simple-bus=sram-controller@01c00000$2allwinner,sun4i-a10-sram-controller0=sram@00000000 2mmio-sram =sram@00010000 2mmio-sram =sram-section@00002allwinner,sun4i-a10-sram-djokay""dma-controller@01c020002allwinner,sun4i-a10-dma pc{spi@01c050002allwinner,sun4i-a10-spiPp  cahbmodrxtx jdisabledspi@01c060002allwinner,sun4i-a10-spi`p  cahbmod rxtx jdisabledmmc@01c0f0002allwinner,sun5i-a13-mmc cahbmmcoutputsamplep jokaydefaultmmc@01c100002allwinner,sun5i-a13-mmc c ahbmmcoutputsamplep! jdisabledmmc@01c110002allwinner,sun5i-a13-mmc c  ahbmmcoutputsamplep" jdisabledusb@01c130002allwinner,sun4i-a10-musb0cp&mc!usb! "jokayotgphy@01c13400!2allwinner,sun5i-a13-usb-phy4H,phy_ctrlpmu1c#usb_phy6##=usb0_resetusb1_resetjokaydefault$%IZm&~'!!usb@01c14000&2allwinner,sun5i-a13-ehcigeneric-ehci@p'c!usbjokayusb@01c14400&2allwinner,sun5i-a13-ohcigeneric-ohciDp(c#!usbjokayspi@01c170002allwinner,sun4i-a10-spipp  c(ahbmodrxtx jdisabledinterrupt-controller@01c204002allwinner,sun4i-a10-icpinctrl@01c20800pc)2allwinner,sun5i-a13-pinctrli2c0@0PB0PB1i2c0--i2c1@0 PB15PB16i2c1..i2c2@0 PB17PB18i2c2//mmc0@0PF0PF1PF2PF3PF4PF5mmc0mmc2@0.PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15mmc2uart3@0 PG9PG10uart3uart3-cts-rts@0 PG11PG12uart3pwm0PB2pwmlcd_rgb666@0hPD2PD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27lcd0uart1@0 PE10PE11uart1uart1@1PG3PG4uart1,,ahci_pwr_pin@0PB8 gpio_out::usb0_vbus_pin@0PG12 gpio_out;;usb1_vbus_pin@0PG11 gpio_out<<usb2_vbus_pin@0PH3 gpio_out==mmc0_cd_pin@0PG0gpio_inled_pins@0PG9 gpio_out>>usb0_id_detect_pin@0PG2gpio_in$$usb0_vbus_detect_pin@0PG1gpio_in%%timer@01c20c002allwinner,sun4i-a10-timer pcwatchdog@01c20c902allwinner,sun4i-a10-wdt lradc@01c228002allwinner,sun4i-a10-lradc-keys(p jdisabledcodec@01c22c002allwinner,sun4i-a10-codec,@p c)* apbcodecrxtx jdisabledeeprom@01c238002allwinner,sun4i-a10-sid8rtp@01c250002allwinner,sun5i-a13-tsPp#66serial@01c284002snps,dw-apb-uart„p9Cc+jokaydefault,serial@01c28c002snps,dw-apb-uartŒp9Cc+ jdisabledi2c@01c2ac002allwinner,sun4i-a10-i2c¬pc+jokaydefault-i2c@01c2b0002allwinner,sun4i-a10-i2c°pc+jokaydefault.i2c@01c2b4002allwinner,sun4i-a10-i2c´p c+jokaydefault/timer@01c600002allwinner,sun5i-a13-hstimerpRSclcd-controller@01c0c0002allwinner,sun5i-a13-tconp,6=lcdc$0ahbtcon-ch0tcon-ch1tcon-pixel-clock jdisabledportsport@0endpoint@0P155port@1pwm@01c20e002allwinner,sun5i-a13-pwm c` jdisableddisplay-frontend@01e00000%2allwinner,sun5i-a13-display-frontendp/c.2 ahbmodram62 jdisabled99portsport@1endpoint@0P344display-backend@01e60000$2allwinner,sun5i-a13-display-backendc, ahbmodram6 jdisabled.kportsport@0endpoint@0P433port@1endpoint@0P511thermal-zonescpu_thermal6cooling-mapsmap07 8tripscpu_alert0Lpassive77cpu_crit criticaldisplay-engine#2allwinner,sun5i-a13-display-engine9ahci-5v2regulator-fixeddefault:ahci-5vLK@LK@2DU jdisabledusb0-vbus2regulator-fixeddefault; usb0-vbusLK@LK@DU jokay&&usb1-vbus2regulator-fixeddefault< usb1-vbusLK@LK@2DU jokay''usb2-vbus2regulator-fixeddefault= usb2-vbusLK@LK@2DU jdisabledvcc3v02regulator-fixedvcc3v0--vcc3v32regulator-fixedvcc3v32Z2Zvcc5v02regulator-fixedvcc5v0LK@LK@leds 2gpio-ledsdefault>power Wa13-olinuxino-micro:green:power ]on #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusserial0device_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levellinux,phandle#clock-cellsclock-frequencyclock-output-namesclock-divclock-multassigned-clocksassigned-clock-parentsclock-indices#reset-cellsinterrupts#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedinterrupt-namesphysphy-namesextconallwinner,sramdr_mode#phy-cellsreg-namesresetsreset-namesusb0_id_det-gpiousb0_vbus_det-gpiousb0_vbus-supplyusb1_vbus-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthremote-endpoint#pwm-cellsassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisallwinner,pipelinesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highlabeldefault-state