P%8Lx(L@ ,A10s-Wobo i5'2wobo,a10s-wobo-i5allwinner,sun5i-a10schosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-hdmi$c$+, jdisabledframebuffer@102allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0c$, jdisabledframebuffer@202allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-tve0$c"$, jdisabledaliases q/soc@01c00000/ethernet@01c0b000{/soc@01c00000/serial@01c28000memorymemorycpuscpu@0cpu2arm,cortex-a8cclocks=dummy 2fixed-clock  clk@01c200502allwinner,sun4i-a10-osc-clkPn6osc24Mosc3M_clk2fixed-factor-clockcosc3Mclk@0 2fixed-clockosc32k  clk@01c200002allwinner,sun4i-a10-pll1-clkcpll1  clk@01c200082allwinner,sun5i-a13-pll2-clkc pll2-1xpll2-2xpll2-4xpll2-8xclk@01c200102allwinner,sun4i-a10-pll3-clkcpll3pll3x2_clk32allwinner,sun4i-a10-pll3-2x-clkfixed-factor-clockcpll3-2xclk@01c200182allwinner,sun4i-a10-pll1-clkcpll4clk@01c200202allwinner,sun4i-a10-pll5-clk cpll5_ddrpll5_otherclk@01c200282allwinner,sun4i-a10-pll6-clk(cpll6_satapll6_otherpll6clk@01c200302allwinner,sun4i-a10-pll3-clk0cpll7  pll7x2_clk2fixed-factor-clockc pll7-2xcpu@01c200542allwinner,sun4i-a10-cpu-clkTc  cpuaxi@01c200542allwinner,sun4i-a10-axi-clkTcaxi  ahb@01c200542allwinner,sun5i-a13-ahb-clkTc ahbapb0@01c200542allwinner,sun4i-a10-apb0-clkTcapb0clk@01c200582allwinner,sun4i-a10-apb1-clkXc apb1clk@01c2005c"2allwinner,sun4i-a10-axi-gates-clk\c  axi_dramclk@01c200802allwinner,sun4i-a10-mod0-clkcnandclk@01c200842allwinner,sun4i-a10-mod0-clkcmsclk@01c200882allwinner,sun4i-a10-mmc-clkcmmc0mmc0_outputmmc0_sampleclk@01c2008c2allwinner,sun4i-a10-mmc-clkcmmc1mmc1_outputmmc1_sampleclk@01c200902allwinner,sun4i-a10-mmc-clkcmmc2mmc2_outputmmc2_sampleclk@01c200982allwinner,sun4i-a10-mod0-clkctsclk@01c2009c2allwinner,sun4i-a10-mod0-clkcssclk@01c200a02allwinner,sun4i-a10-mod0-clkcspi0clk@01c200a42allwinner,sun4i-a10-mod0-clkcspi1clk@01c200a82allwinner,sun4i-a10-mod0-clkcspi2!!clk@01c200b02allwinner,sun4i-a10-mod0-clkcir0clk@01c200cc&2allwinner,sun5i-a13-usb-clkcusb_ohci0usb_phyclk@01c201402allwinner,sun4i-a10-codec-clk@ccodec##clk@01c2015c2allwinner,sun5i-a13-mbus-clk\cmbusclk@01c20060#2allwinner,sun5i-a10s-ahb-gates-clk`cl  "$(+,.34ahb_usbotgahb_ehciahb_ohciahb_ssahb_dmaahb_bistahb_mmc0ahb_mmc1ahb_mmc2ahb_nandahb_sdramahb_emacahb_tsahb_spi0ahb_spi1ahb_spi2ahb_gpsahb_stimerahb_veahb_tveahb_lcdahb_csiahb_hdmiahb_de_beahb_de_feahb_iepahb_mali400clk@01c20068$2allwinner,sun5i-a10s-apb0-gates-clkhc 1apb0_codecapb0_iisapb0_pioapb0_irapb0_keypad""clk@01c2006c$2allwinner,sun5i-a10s-apb1-gates-clklcJapb1_i2c0apb1_i2c1apb1_i2c2apb1_uart0apb1_uart1apb1_uart2apb1_uart3$$soc@01c00000 2simple-bus=sram-controller@01c00000$2allwinner,sun4i-a10-sram-controller0=sram@00000000 2mmio-sram =sram-section@80002allwinner,sun4i-a10-sram-a3-a4@jokay&&sram@00010000 2mmio-sram =sram-section@00002allwinner,sun4i-a10-sram-djokaydma-controller@01c020002allwinner,sun4i-a10-dma 3c>spi@01c050002allwinner,sun4i-a10-spiP3  cIahbmodUZrxtx jdisabledspi@01c060002allwinner,sun4i-a10-spi`3  cIahbmodU Zrxtx jdisabledmmc@01c0f0002allwinner,sun5i-a13-mmc cIahbmmcoutputsample3 jokayddefaultr|mmc@01c100002allwinner,sun5i-a13-mmc c Iahbmmcoutputsample3! jdisabledmmc@01c110002allwinner,sun5i-a13-mmc c Iahbmmcoutputsample3" jdisabledusb@01c130002allwinner,sun4i-a10-musb0c3&mcusbjokayhostphy@01c134002allwinner,sun5i-a13-usb-phy4Hphy_ctrlpmu1cIusb_phyusb0_resetusb1_resetjokay usb@01c14000&2allwinner,sun5i-a13-ehcigeneric-ehci@3'cusbjokayusb@01c14400&2allwinner,sun5i-a13-ohcigeneric-ohciD3(cusbjokayspi@01c170002allwinner,sun4i-a10-spip3  c!IahbmodUZrxtx jdisabledinterrupt-controller@01c204002allwinner,sun4i-a10-ic2pinctrl@01c208003c"C2S2allwinner,sun5i-a10s-pinctrli2c0@0_PB0PB1ni2c0%%i2c1@0 _PB15PB16ni2c1i2c2@0 _PB17PB18ni2c2mmc0@0_PF0PF1PF2PF3PF4PF5nmmc0mmc2@0._PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15nmmc2uart3@0 _PG9PG10nuart3uart3-cts-rts@0 _PG11PG12nuart3pwm0_PB2npwmuart0@0 _PB19PB20nuart0**uart2@0 _PC18PC19nuart2emac0@0K_PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16nemacemac0@1X_PD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27nemac''mmc1@0_PG3PG4PG5PG6PG7PG8nmmc1spi2@0_PB12PB13PB14nspi2spi2_cs0@0_PB11nspi2ahci_pwr_pin@0_PB8 ngpio_out++usb0_vbus_pin@0_PB9 ngpio_out,,usb1_vbus_pin@0_PG12 ngpio_out--usb2_vbus_pin@0_PH3 ngpio_out..led_pins@0_PB2 ngpio_out//mmc0_cd_pin@0_PB3ngpio_inemac_power_pin@0_PA02 ngpio_out00timer@01c20c002allwinner,sun4i-a10-timer 3cwatchdog@01c20c902allwinner,sun4i-a10-wdt lradc@01c228002allwinner,sun4i-a10-lradc-keys(3 jdisabledcodec@01c22c002allwinner,sun4i-a10-codec,@3 c"# IapbcodecUZrxtx jdisabledeeprom@01c238002allwinner,sun4i-a10-sid8rtp@01c250002allwinner,sun5i-a13-tsP3serial@01c284002snps,dw-apb-uart„3c$ jdisabledserial@01c28c002snps,dw-apb-uartŒ3c$ jdisabledi2c@01c2ac002allwinner,sun4i-a10-i2c¬3c$jokayddefaultr%pmic@34432x-powers,axp2092gpio2x-powers,axp209-gpioCSregulatorsdcdc2vdd-cpuB@,\dcdc3 vdd-int-dll,ldo1 , vdd-rtcldo2avcc-,-ldo3 vcc-wifi12Z,2Zldo4 vcc-wifi22Z,2Zldo5ldo5 jdisabledusb_power_supply!2x-powers,axp202-usb-power-supply jdisabledi2c@01c2b0002allwinner,sun4i-a10-i2c°3c$ jdisabledi2c@01c2b4002allwinner,sun4i-a10-i2c´3 c$ jdisabledtimer@01c600002allwinner,sun5i-a13-hstimer3RScethernet@01c0b0002allwinner,sun4i-a10-emac37c&jokayddefaultr'D(mdio@01c0b0802allwinner,sun4i-a10-mdiojokayH)ethernet-phy@1((pwm@01c20e002allwinner,sun5i-a10s-pwm cS jdisabledserial@01c280002snps,dw-apb-uart€3c$jokayddefaultr*serial@01c288002snps,dw-apb-uartˆ3c$ jdisabledahci-5v2regulator-fixedddefaultr+ahci-5vLK@,LK@^p jdisabledusb0-vbus2regulator-fixedddefaultr, usb0-vbusLK@,LK@p  jdisabledusb1-vbus2regulator-fixedddefaultr- usb1-vbusLK@,LK@^p jokay  usb2-vbus2regulator-fixedddefaultr. usb2-vbusLK@,LK@^p jdisabledvcc3v02regulator-fixedvcc3v0-,-vcc3v32regulator-fixedvcc3v32Z,2Zvcc5v02regulator-fixedvcc5v0LK@,LK@leds 2gpio-ledsddefaultr/bluea10s-wobo-i5:blue:usronemac-3v32regulator-fixedddefaultr0 emac-3v32Z,2ZN p)) #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0serial0device_typeregcpu-supply#clock-cellsclock-frequencylinux,phandleclock-output-namesclock-divclock-multassigned-clocksassigned-clock-parentsclock-indices#reset-cellsinterrupts#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedinterrupt-namesphysphy-namesextconallwinner,sramdr_mode#phy-cellsreg-namesresetsreset-namesusb1_vbus-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltphyphy-supply#pwm-cellsregulator-boot-onenable-active-highgpiolabeldefault-statestartup-delay-us