BH>(>p DENX MCV EVK#!altr,socfpga-cyclone5altr,socfpgachosen,serial0:115200n8aliases8/soc/ethernet@ff700000B/soc/ethernet@ff702000L/soc/serial0@ffc02000T/soc/serial1@ffc03000\/soc/timer0@ffc08000c/soc/timer1@ffc09000j/soc/timer2@ffd00000q/soc/timer3@ffd01000x/soc/i2c@ffc04000/stmpe811@41memorymemory@cpusaltr,socfpga-smpcpu@0!arm,cortex-a9cpucpu@1!arm,cortex-a9cpuintc@fffed000!arm,cortex-a9-gicsoc !simple-bussocamba !simple-buspdma@ffe01000!arm,pl330arm,primecell`hijklmno " 0 7apb_pclk**can@ffc00000 !bosch,d_can00Cokaycan@ffc01000 !bosch,d_can00Cokayclkmgr@ffd04000 !altr,clk-mgr@clocksosc1J !fixed-clockW}x@osc2J !fixed-clockf2s_periph_ref_clkJ !fixed-clock  f2s_sdram_ref_clkJ !fixed-clock  main_pllJ!altr,socfpga-pll-clock0@mpuclkJ!altr,socfpga-perip-clk0 g H  mainclkJ!altr,socfpga-perip-clk0 g Ldbg_base_clkJ!altr,socfpga-perip-clk0 g Pmain_qspi_clkJ!altr,socfpga-perip-clk0Tmain_nand_sdmmc_clkJ!altr,socfpga-perip-clk0Xcfg_h2f_usr0_clkJ!altr,socfpga-perip-clk0\periph_pllJ!altr,socfpga-pll-clock 0   emac0_clkJ!altr,socfpga-perip-clk0 emac1_clkJ!altr,socfpga-perip-clk0 per_qsi_clkJ!altr,socfpga-perip-clk0 per_nand_mmc_clkJ!altr,socfpga-perip-clk0 per_base_clkJ!altr,socfpga-perip-clk0 h2f_usr1_clkJ!altr,socfpga-perip-clk0 sdram_pllJ!altr,socfpga-pll-clock 0   ddr_dqs_clkJ!altr,socfpga-perip-clk0 ddr_2x_dqs_clkJ!altr,socfpga-perip-clk0 ddr_dq_clkJ!altr,socfpga-perip-clk0 h2f_usr2_clkJ!altr,socfpga-perip-clk0 mpu_periph_clkJ!altr,socfpga-perip-clk0 o))mpu_l2_ram_clkJ!altr,socfpga-perip-clk0 ol4_main_clkJ!altr,socfpga-gate-clk0}`l3_main_clkJ!altr,socfpga-perip-clk0ol3_mp_clkJ!altr,socfpga-gate-clk0 gd}`l3_sp_clkJ!altr,socfpga-gate-clk0 gdl4_mp_clkJ!altr,socfpga-gate-clk0 gd}`""l4_sp_clkJ!altr,socfpga-gate-clk0 gd}`##dbg_at_clkJ!altr,socfpga-gate-clk0 gh}`dbg_clkJ!altr,socfpga-gate-clk0 gh}`dbg_trace_clkJ!altr,socfpga-gate-clk0 gl}`dbg_timer_clkJ!altr,socfpga-gate-clk0}`cfg_clkJ!altr,socfpga-gate-clk0}`h2f_user0_clkJ!altr,socfpga-gate-clk0}` emac_0_clkJ!altr,socfpga-gate-clk0}emac_1_clkJ!altr,socfpga-gate-clk0}usb_mp_clkJ!altr,socfpga-gate-clk0} g++spi_m_clkJ!altr,socfpga-gate-clk0} g((can0_clkJ!altr,socfpga-gate-clk0} gcan1_clkJ!altr,socfpga-gate-clk0} g gpio_db_clkJ!altr,socfpga-gate-clk0} gh2f_user1_clkJ!altr,socfpga-gate-clk0}sdmmc_clkJ!altr,socfpga-gate-clk 0 }sdmmc_clk_dividedJ!altr,socfpga-gate-clk0}o&&nand_x_clkJ!altr,socfpga-gate-clk 0 } nand_clkJ!altr,socfpga-gate-clk 0 } oqspi_clkJ!altr,socfpga-gate-clk 0 } ddr_dqs_clk_gateJ!altr,socfpga-gate-clk0}ddr_2x_dqs_clk_gateJ!altr,socfpga-gate-clk0}ddr_dq_clk_gateJ!altr,socfpga-gate-clk0}h2f_user2_clkJ!altr,socfpga-gate-clk0}fpgamgr@ff706000!altr,socfpga-fpga-mgrp` ethernet@ff7000000!altr,socfpga-stmmacsnps,dwmac-3.70asnps,dwmac  `p  smacirq0 7stmmaceth!  stmmaceth Cokay%rgmiiethernet@ff7020000!altr,socfpga-stmmacsnps,dwmac-3.70asnps,dwmac  `p  xmacirq0 7stmmaceth!! stmmaceth  Cdisabledgpio@ff708000!snps,dw-apb-gpiop0"Cokaygpio-controller@0!snps,dw-apb-gpio-port.>J gpio@ff709000!snps,dw-apb-gpiop0"Cokaygpio-controller@0!snps,dw-apb-gpio-port.>J $$gpio@ff70a000!snps,dw-apb-gpiop0"Cokaygpio-controller@0!snps,dw-apb-gpio-port.>J i2c@ffc04000!snps,designware-i2c@0# CokayXstmpe811@41 !st,stmpe811Acf m$stmpe_touchscreen !st,stmpe-tsvi2c@ffc05000!snps,designware-i2cP0#  Cdisabledi2c@ffc06000!snps,designware-i2c`0#  Cdisabledi2c@ffc07000!snps,designware-i2cp0#  Cdisabledeccmgr@ffd08140!altr,socfpga-ecc-managerl2-ecc@ffd08140!altr,socfpga-l2-eccЁ@$%ocram-ecc@ffd08144!altr,socfpga-ocram-eccЁD%l2-cache@fffef000!arm,pl310-cache &   +9dwmmc0@ff704000!altr,socfpga-dw-mshcp@  0"&7biuciuCokayHR\fxsram@ffff0000 !mmio-sram%%rstmgr@ffd05000 !altr,rst-mgrP!!snoop-control-unit@fffec000!arm,cortex-a9-scusdr@ffc25000!sysconP''sdramedac!altr,sdram-edac' 'spi@fff00000!snps,dw-apb-ssi 0( Cdisabledspi@fff01000!snps,dw-apb-ssi 0( Cdisabledsysmgr@ffd08000!altr,sys-mgrsysconЀ@Ѐ  timer@fffec600!arm,cortex-a9-twd-timer  0)timer0@ffc08000!snps,dw-apb-timer 0#7timertimer1@ffc09000!snps,dw-apb-timer 0#7timertimer2@ffd00000!snps,dw-apb-timer 07timertimer3@ffd01000!snps,dw-apb-timer 07timerserial0@ffc02000!snps,dw-apb-uart  0#**txrxCokayserial1@ffc03000!snps,dw-apb-uart0 0#**txrxusbphy@0!usb-nop-xceivCokay,,usb@ffb00000 !snps,dwc2 }0+7otg!"dwc2, usb2-phy Cdisabledusb@ffb40000 !snps,dwc2 0+7otg!#dwc2, usb2-phyCokaywatchdog@ffd02000 !snps,dw-wdt  0Cokaywatchdog@ffd03000 !snps,dw-wdt0 0 Cdisabled #address-cells#size-cellsmodelcompatiblestdout-pathethernet0ethernet1serial0serial1timer0timer1timer2timer3stmpe-i2c0device_typeregenable-methodnext-level-cache#interrupt-cellsinterrupt-controllerlinux,phandleinterrupt-parentrangesinterrupts#dma-cells#dma-channels#dma-requestsclocksclock-namesstatus#clock-cellsclock-frequencydiv-regfixed-dividerclk-gateclk-phasealtr,sysmgr-sysconinterrupt-namesmac-addressresetsreset-namessnps,multicast-filter-binssnps,perfect-filter-entriestx-fifo-depthrx-fifo-depthphy-modegpio-controller#gpio-cellssnps,nr-gpiosspeed-modeidblocksirq-gpiots,sample-timets,mod-12bts,ref-selts,adc-freqts,ave-ctrlts,touch-det-delayts,settlingts,fraction-zts,i-driveiramcache-unifiedcache-levelarm,tag-latencyarm,data-latencyprefetch-dataprefetch-instrnum-slotsbroken-cdbus-widthcap-mmc-highspeedcap-sd-highspeed#reset-cellsaltr,modrst-offsetaltr,sdr-sysconnum-cscpu1-start-addrreg-shiftreg-io-widthdmasdma-names#phy-cellsphysphy-names