~8(#radxa,rock2-squarerockchip,rk3288&7Radxa Rock 2 Squarechosen=serial2:115200n8aliasesI/ethernet@ff290000S/i2c@ff650000X/i2c@ff140000]/i2c@ff660000b/i2c@ff150000g/i2c@ff160000l/i2c@ff170000q/dwmmc@ff0f0000w/dwmmc@ff0c0000}/dwmmc@ff0d0000/dwmmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12 `@p@ @OOa sB@ ~ ' 9  K 0 !0@>EQWcpu@501cpuarm,cortex-a12 QWcpu@502cpuarm,cortex-a12 QWcpu@503cpuarm,cortex-a12 QWamba simple-bus_dma-controller@ff250000arm,pl330arm,primecell%@fq> apb_pclkQWdma-controller@ff600000arm,pl330arm,primecell`@fq> apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@fq> apb_pclkQMWMreserved-memory_dma-unusable@fe000000oscillator fixed-clockn6xin24mQ W timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H > a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр >Drvbiuciuciu-driveciu-sample   @okay!3DVakdefaulty dwmmc@ff0d0000rockchip,rk3288-dw-mshcр >Eswbiuciuciu-driveciu-sample  ! @okay3Vakdefaultydwmmc@ff0e0000rockchip,rk3288-dw-mshcр >Ftxbiuciuciu-driveciu-sample  "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр >Guybiuciuciu-driveciu-sample  #@okay!Vakdefault ysaradc@ff100000rockchip,saradc $>I[saradcapb_pclk W saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi>ARspiclkapb_pclk  txrx ,kdefaulty !" disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi>BSspiclkapb_pclk txrx -kdefaulty#$%& disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi>CTspiclkapb_pclktxrx .kdefaulty'()* disabledi2c@ff140000rockchip,rk3288-i2c >i2c>Mkdefaulty+ disabledi2c@ff150000rockchip,rk3288-i2c ?i2c>Okdefaulty, disabledi2c@ff160000rockchip,rk3288-i2c @i2c>Pkdefaulty- disabledi2c@ff170000rockchip,rk3288-i2c Ai2c>Qkdefaulty.okayQ^W^serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7>MUbaudclkapb_pclkkdefaulty/ disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8>NVbaudclkapb_pclkkdefaulty0 disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9>OWbaudclkapb_pclkkdefaulty1okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :>PXbaudclkapb_pclkkdefaulty2 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;>QYbaudclkapb_pclkkdefaulty3 disabledthermal-zonesreserve_thermal*4cpu_thermald*4tripscpu_alert0:pFpassiveQ5W5cpu_alert1:$FpassiveQ6W6cpu_crit:_F criticalcooling-mapsmap0Q5 Vmap1Q6 Vgpu_thermald*4tripsgpu_alert0:pFpassiveQ7W7gpu_crit:_F criticalcooling-mapsmap0Q7 Vtsadc@ff280000rockchip,rk3288-tsadc( %>HZtsadcapb_pclk  tsadc-apbkinitdefaultsleepy8e9o8ysokayQ4W4ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq:8>fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac B stmmacethok;input)rgmii2<kdefaulty=> =?M c'u0x0usb@ff500000 generic-ehciP >usbhost@usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T >otghostA usb2-phy disabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X >otgotg@@ B usb2-phy disabledusb@ff5c0000 generic-ehci\ >usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c>LkdefaultyCokayact8846@5aactive-semi,act8846ZD ED"D-D8DregulatorsREG1CVCC_DDRROjOREG2CVCC_IOR2Zj2ZQWREG3CVDD_LOGRB@jB@REG4CVCC_20RjQEWEREG5 CVCCIO_SDR2Zj2ZQWREG6 CVDD10_LCDRB@jB@REG7 CVCCA_CODECR2Zj2ZREG8CVCCA_TPR2Zj2ZREG9 CVCCIO_PMUR2Zj2ZQ<W<REG10CVDD_10RB@jB@REG11CVCC_18Rw@jw@QWREG12 CVCC18_LCDRw@jw@syr827@40silergy,syr827@,Cvdd_cpuR Pjp@DQWsyr828@41silergy,syr828A,R PjpCvdd_gpu@Dhym8563@51haoyu,hym8563Qxin32k&FkdefaultyGQmWmi2c@ff660000rockchip,rk3288-i2cf =i2c>NkdefaultyH disabledpwm@ff680000rockchip,rk3288-pwmhkdefaultyI>^pwm disabledpwm@ff680010rockchip,rk3288-pwmhkdefaultyJ>^pwm disabledpwm@ff680020rockchip,rk3288-pwmh kdefaultyK>^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0kdefaultyL>^pwm disabledbus_intmem@ff700000 mmio-sramp _psmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsQWpower-controller!rockchip,rk3288-power-controller h QPWPpd_vio@9 >chgfdehilkjpd_hevc@11 >oppd_video@12 >pd_gpu@13 >reboot-modesyscon-reboot-mode 'RB3RBARB QRBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv:]Hjk$j#gׄeрxhрxhQWsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwQ:W:edp-phyrockchip,rk3288-dp-phy>h24m disabledQ[W[io-domains"rockchip,rk3288-io-voltage-domainokay<<usbphyrockchip,rk3288-usb-phyokayusb-phy@320 >]phyclkQBWBusb-phy@3344>^phyclkQ@W@usb-phy@348H>_phyclkQAWAwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt>p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk>TMtx 6kdefaultyN:okayQkWki2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5MMtxrxi2s_hclki2s_clk>RkdefaultyO1 disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 >}aclkhclksclkapb_pclk  crypto-rstokayvop@ff930000rockchip,rk3288-vop >aclk_vopdclk_vophclk_vopKP  def axiahbdclkYQokayportQ W endpoint@0`RQ_W_endpoint@1`SQ\W\endpoint@2`TQYWYiommu@ff930300rockchip,iommu  vopb_mmuKP pokayQQWQvop@ff940000rockchip,rk3288-vop >aclk_vopdclk_vophclk_vopKP   axiahbdclkYUokayportQ W endpoint@0`VQ`W`endpoint@1`WQ]W]endpoint@2`XQZWZiommu@ff940300rockchip,iommu  vopl_mmuKP pokayQUWUmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ >~d refpclkKP : disabledportsportendpoint@0`YQTWTendpoint@1`ZQXWXdp@ff970000rockchip,rk3288-dp@ b>icdppclk[dp odp: disabledportsport@0endpoint@0`\QSWSendpoint@1`]QWWWhdmi@ff980000rockchip,rk3288-dw-hdmi: g>hm iahbisfrKP okay}^portsportendpoint@0`_QRWRendpoint@1``QVWVinterrupt-controller@ffc01000 arm,gic-400  @ `   QWefuse@ffb40000rockchip,rockchip-efuse >q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl:_gpio0@ff750000rockchip,gpio-banku Q>@QFWFgpio1@ff780000rockchip,gpio-bankx R>Agpio2@ff790000rockchip,gpio-banky S>Bgpio3@ff7a0000rockchip,gpio-bankz T>CQgWggpio4@ff7b0000rockchip,gpio-bank{ U>DQ?W?gpio5@ff7c0000rockchip,gpio-bank| V>Egpio6@ff7d0000rockchip,gpio-bank} W>Fgpio7@ff7e0000rockchip,gpio-bank~ X>GQhWhgpio8@ff7f0000rockchip,gpio-bank Y>HQiWihdmihdmi-ddc aapcfg-pull-upQbWbpcfg-pull-downQcWcpcfg-pull-noneQaWapcfg-pull-none-12ma QdWdsleepglobal-pwroffaddrio-pwroffaddr0-retentionbddr1-retentionbedpedp-hpd ci2c0i2c0-xfer aaQCWCi2c1i2c1-xfer aaQ+W+i2c2i2c2-xfer  a aQHWHi2c3i2c3-xfer aaQ,W,i2c4i2c4-xfer aaQ-W-i2c5i2c5-xfer aaQ.W.i2s0i2s0-bus`aaaaaaQOWOsdmmcsdmmc-clkaQ W sdmmc-cmdbQ W sdmmc-cdbQWsdmmc-bus1bsdmmc-bus4@bbbbQWsdmmc-pwr aQpWpsdio0sdio0-bus1bsdio0-bus4@bbbbQWsdio0-cmdbQWsdio0-clkaQWsdio0-cdbsdio0-wpbsdio0-pwrbsdio0-bkpwrbsdio0-intbQWsdio1sdio1-bus1bsdio1-bus4@bbbbsdio1-cdbsdio1-wpbsdio1-bkpwrbsdio1-intbsdio1-cmdbsdio1-clkasdio1-pwr bemmcemmc-clkaQWemmc-cmdbQWemmc-pwr bemmc-bus1bemmc-bus4@bbbbemmc-bus8bbbbbbbbQWemmc-reset aQfWfspi0spi0-clk bQWspi0-cs0 bQ"W"spi0-txbQ W spi0-rxbQ!W!spi0-cs1bspi1spi1-clk bQ#W#spi1-cs0 bQ&W&spi1-rxbQ%W%spi1-txbQ$W$spi2spi2-cs1bspi2-clkbQ'W'spi2-cs0bQ*W*spi2-rxbQ)W)spi2-tx bQ(W(uart0uart0-xfer baQ/W/uart0-ctsbuart0-rtsauart1uart1-xfer b aQ0W0uart1-cts buart1-rts auart2uart2-xfer baQ1W1uart3uart3-xfer baQ2W2uart3-cts buart3-rts auart4uart4-xfer  b aQ3W3uart4-ctsbuart4-rtsatsadcotp-gpio aQ8W8otp-out aQ9W9pwm0pwm0-pinaQIWIpwm1pwm1-pinaQJWJpwm2pwm2-pinaQKWKpwm3pwm3-pinaQLWLgmacrgmii-pinsaaaaddddaaa ddaaQ=W=rmii-pinsaaaaaaaaaaphy-rsteQ>W>spdifspdif-tx aQNWNpcfg-output-highQeWeirir-intbQjWjpmicpmic-intbQGWGusbhost-vbus-drvaQoWosdiowifi-enableaQnWnemmc-pwrseqmmc-pwrseq-emmcyfkdefault g QWexternal-gmac-clock fixed-clocksY@ ext_gmacQ;W;flash-regulatorregulator-fixedCvcc_sysRw@jw@)QWvsys-regulatorregulator-fixedCvcc_sysRLK@jLK@QDWDgpio-leds gpio-ledsheartbeat #h:rock2:green:state1 @heartbeatmmc #F :rock2:blue:state2@mmc0ir-receivergpio-ir-receiver #ikdefaultyjsoundsimple-audio-cardVSPDIFsimple-audio-card,dai-link@1cpumkcodecmlspdif-outlinux,spdif-ditQlWlsdio-pwrseqmmc-pwrseq-simple>m ext_clockkdefaultyn ?QWvcc-host-regulatorregulator-fixedw HFkdefaultyo Cvcc_hostsdmmc-regulatorregulator-fixed Hh kdefaultypCvcc_sdR2Zj2ZQW #address-cells#size-cellscompatibleinterrupt-parentmodelstdout-pathethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removable#io-channel-cellsreset-namesdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usrx_delaytx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmasystem-power-controllerinl1-supplyinl2-supplyinl3-supplyvp1-supplyvp2-supplyvp3-supplyvp4-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onfcs,suspend-voltage-selectorregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supply#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830lcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highreset-gpiosstartup-delay-uslabellinux,default-triggersimple-audio-card,namesound-daienable-active-high