8l(4*rockchip,rk3288-evb-rk808rockchip,rk3288&chosenaliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 @,3?Ecpu@501cpuarm,cortex-a12?Ecpu@502cpuarm,cortex-a12?Ecpu@503cpuarm,cortex-a12?Eamba simple-busMdma-controller@ff250000arm,pl330arm,primecell%@T_, zapb_pclk?Edma-controller@ff600000arm,pl330arm,primecell`@T_, zapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@T_, zapb_pclk?GEGreserved-memoryMdma-unusable@fe000000oscillator fixed-clockn6xin24m? E timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H , a ztimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр ,Drvzbiuciuciu-driveciu-sample  @okay!2DOYdefaultg q}dwmmc@ff0d0000rockchip,rk3288-dw-mshcр ,Eswzbiuciuciu-driveciu-sample ! @ disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр ,Ftxzbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр ,Guyzbiuciuciu-driveciu-sample #@okayDOYdefaultgsaradc@ff100000rockchip,saradc $,I[zsaradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi,ARzspiclkapb_pclk  txrx ,Ydefaultg disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi,BSzspiclkapb_pclk txrx -Ydefaultg disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi,CTzspiclkapb_pclktxrx .Ydefaultg !" disabledi2c@ff140000rockchip,rk3288-i2c >zi2c,MYdefaultg# disabledi2c@ff150000rockchip,rk3288-i2c ?zi2c,OYdefaultg$ disabledi2c@ff160000rockchip,rk3288-i2c @zi2c,PYdefaultg% disabledi2c@ff170000rockchip,rk3288-i2c Azi2c,QYdefaultg&okay?YEYserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7,MUzbaudclkapb_pclkYdefaultg'okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8,NVzbaudclkapb_pclkYdefaultg(okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9,OWzbaudclkapb_pclkYdefaultg)okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :,PXzbaudclkapb_pclkYdefaultg*okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;,QYzbaudclkapb_pclkYdefaultg+okaythermal-zonesreserve_thermal,cpu_thermald,tripscpu_alert0ppassive?-E-cpu_alert1$passive?.E.cpu_crit_ criticalcooling-mapsmap0'- ,map1'. ,gpu_thermald,tripsgpu_alert0ppassive?/E/gpu_crit_ criticalcooling-mapsmap0'/ ,tsadc@ff280000rockchip,rk3288-tsadc( %,HZztsadcapb_pclk tsadc-apbYinitdefaultsleepg0;1E0Oesokay|?,E,ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq28,fgc]Mzstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok3rgmiiinput 4 'B@'75Ydefaultg6N0Wusb@ff500000 generic-ehciP ,zusbhost`7eusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T ,zotgohost`8 eusb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X ,zotgootgw@@ `9 eusb2-phy disabledusb@ff5c0000 generic-ehci\ ,zusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <zi2c,LYdefaultg:okaypmic@1brockchip,rk808&;Ydefaultg<=xin32krk808-clkout2>>>>>>(?4@@@M>Z@gAregulatorsDCDC_REG1t qpvdd_arm?Eregulator-state-memDCDC_REG2t Pvdd_gpuregulator-state-mem B@DCDC_REG3tvcc_ddrregulator-state-memDCDC_REG4t2Z2Zvcc_io?@E@regulator-state-mem 2ZLDO_REG1t2Z2Z vccio_pmu?AEAregulator-state-mem 2ZLDO_REG2t2Z2Zvcc_tpregulator-state-memLDO_REG3tB@B@vdd_10regulator-state-mem B@LDO_REG4tw@w@ vcc18_lcdregulator-state-mem w@LDO_REG5tw@2Z vccio_sd?Eregulator-state-mem 2ZLDO_REG6tB@B@ vdd10_lcdregulator-state-mem B@LDO_REG7tw@w@vcc_18??E?regulator-state-mem w@LDO_REG8t2Z2Z vcca_codecregulator-state-mem 2ZSWITCH_REG1tvcc_wlregulator-state-memSWITCH_REG2tvcc_lcd?gEgregulator-state-memi2c@ff660000rockchip,rk3288-i2cf =zi2c,NYdefaultgB disabledpwm@ff680000rockchip,rk3288-pwmh&YdefaultgC,^zpwmokay?dEdpwm@ff680010rockchip,rk3288-pwmh&YdefaultgD,^zpwm disabledpwm@ff680020rockchip,rk3288-pwmh &YdefaultgE,^zpwm disabledpwm@ff680030rockchip,rk3288-pwmh0&YdefaultgF,^zpwm disabledbus_intmem@ff700000 mmio-sramp Mpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds?Epower-controller!rockchip,rk3288-power-controller1'h7 ?JEJpd_vio@9 ,chgfdehilkjpd_hevc@11 ,oppd_video@12 ,pd_gpu@13 ,reboot-modesyscon-reboot-modeELRBXRBfRB vRBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv2H'jk$#gׄeрxhрxh?Esyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdw?2E2edp-phyrockchip,rk3288-dp-phy,hz24mokay?UEUio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320 ,]zphyclk?9E9usb-phy@3344,^zphyclk?7E7usb-phy@348H,_zphyclk?8E8watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt,p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif zhclkmclk,TGtx 6YdefaultgH2 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5GGtxrxzi2s_hclki2s_clk,RYdefaultgI disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 ,}zaclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop ,zaclk_vopdclk_vophclk_vopJ def axiahbdclkKokayport? E endpoint@0 L?ZEZendpoint@1 M?VEVendpoint@2 N?SESiommu@ff930300rockchip,iommu  vopb_mmuJ okay?KEKvop@ff940000rockchip,rk3288-vop ,zaclk_vopdclk_vophclk_vopJ  axiahbdclkOokayport? E endpoint@0 P?[E[endpoint@1 Q?WEWendpoint@2 R?TETiommu@ff940300rockchip,iommu  vopl_mmuJ okay?OEOmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ ,~d zrefpclkJ 2 disabledportsportendpoint@0 S?NENendpoint@1 T?RERdp@ff970000rockchip,rk3288-dp@ b,iczdppclk`Uedpodp2okay'portsport@0endpoint@0 V?MEMendpoint@1 W?QEQport@1endpoint X?hEhhdmi@ff980000rockchip,rk3288-dw-hdmi2 g,hm ziahbisfrJ okay1Yportsportendpoint@0 Z?LELendpoint@1 [?PEPinterrupt-controller@ffc01000 arm,gic-400=R  @ `   ?Eefuse@ffb40000rockchip,rockchip-efuse ,q zpclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl2Mgpio0@ff750000rockchip,gpio-banku Q,@cs=R?;E;gpio1@ff780000rockchip,gpio-bankx R,Acs=Rgpio2@ff790000rockchip,gpio-banky S,Bcs=Rgpio3@ff7a0000rockchip,gpio-bankz T,Ccs=Rgpio4@ff7b0000rockchip,gpio-bank{ U,Dcs=R?4E4gpio5@ff7c0000rockchip,gpio-bank| V,Ecs=Rgpio6@ff7d0000rockchip,gpio-bank} W,Fcs=Rgpio7@ff7e0000rockchip,gpio-bank~ X,Gcs=R?bEbgpio8@ff7f0000rockchip,gpio-bank Y,Hcs=Rhdmihdmi-ddc \\pcfg-pull-up?]E]pcfg-pull-down?^E^pcfg-pull-none?\E\pcfg-pull-none-12ma ?aEasleepglobal-pwroff\?=E=ddrio-pwroff\ddr0-retention]ddr1-retention]edpedp-hpd ^i2c0i2c0-xfer \\?:E:i2c1i2c1-xfer \\?#E#i2c2i2c2-xfer  \ \?BEBi2c3i2c3-xfer \\?$E$i2c4i2c4-xfer \\?%E%i2c5i2c5-xfer \\?&E&i2s0i2s0-bus`\\\\\\?IEIsdmmcsdmmc-clk_? E sdmmc-cmd`? E sdmmc-cd]?Esdmmc-bus1]sdmmc-bus4@````?Esdmmc-pwr \?lElsdio0sdio0-bus1]sdio0-bus4@]]]]sdio0-cmd]sdio0-clk\sdio0-cd]sdio0-wp]sdio0-pwr]sdio0-bkpwr]sdio0-int]sdio1sdio1-bus1]sdio1-bus4@]]]]sdio1-cd]sdio1-wp]sdio1-bkpwr]sdio1-int]sdio1-cmd]sdio1-clk\sdio1-pwr ]emmcemmc-clk\?Eemmc-cmd]?Eemmc-pwr ]?Eemmc-bus1]emmc-bus4@]]]]emmc-bus8]]]]]]]]?Espi0spi0-clk ]?Espi0-cs0 ]?Espi0-tx]?Espi0-rx]?Espi0-cs1]spi1spi1-clk ]?Espi1-cs0 ]?Espi1-rx]?Espi1-tx]?Espi2spi2-cs1]spi2-clk]?Espi2-cs0]?"E"spi2-rx]?!E!spi2-tx ]? E uart0uart0-xfer ]\?'E'uart0-cts]uart0-rts\uart1uart1-xfer ] \?(E(uart1-cts ]uart1-rts \uart2uart2-xfer ]\?)E)uart3uart3-xfer ]\?*E*uart3-cts ]uart3-rts \uart4uart4-xfer  ] \?+E+uart4-cts]uart4-rts\tsadcotp-gpio \?0E0otp-out \?1E1pwm0pwm0-pin\?CECpwm1pwm1-pin\?DEDpwm2pwm2-pin\?EEEpwm3pwm3-pin\?FEFgmacrgmii-pins\\\\aaaa\\\ aa\\?6E6rmii-pins\\\\\\\\\\spdifspdif-tx \?HEHpcfg-pull-none-drv-8ma?_E_pcfg-pull-up-drv-8ma?`E`backlightbl-en\?cEcbuttonspwrbtn]?iEilcdlcd-cs\?fEfpmicpmic-int]?<E<usbhost-vbus-drv\?jEjeth_phyeth-phy-pwr\?kEkbacklightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ bYdefaultgcdB@?eEeexternal-gmac-clock fixed-clocksY@ ext_gmac?5E5panellg,lp079qx1-sp0vsimple-panele bgf gportsportendpoint h?XEXgpio-keys gpio-keysYdefaultgipower ;$t/GPIO Key Power5Fdvcc-host-regulatorregulator-fixedX ;Ydefaultgj vcc_hosttvcc-phy-regulatorregulator-fixedX ;Ydefaultgkvcc_phy2Z2Zt?3E3vsys-regulatorregulator-fixedvcc_sysLK@LK@t?>E>sdmmc-regulatorregulator-fixed b Ydefaultglvcc_sd2Z2Zk|@?E #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsreset-namesdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmarockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsforce-hpdddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthbrightness-levelsdefault-brightness-levelenable-gpiospwmsbacklightpower-supplyautorepeatlinux,codelabellinux,input-typedebounce-intervalenable-active-highstartup-delay-usvin-supply