783(2$rockchip,rk3036-evbrockchip,rk3036&!7Rockchip RK3036 Evaluation boardchosenaliases=/i2c@20072000B/i2c@20056000G/i2c@2005a000L/dwmmc@1021c000R/dwmmc@10214000X/dwmmc@10218000^/serial@20060000f/serial@20064000n/serial@20068000v/spi@20074000memoryzmemory`@cpusrockchip,rk3036-smpcpu@f00zcpuarm,cortex-a7 sB@@cpu@f01zcpuarm,cortex-a7amba simple-buspdma@20078000arm,pl330arm,primecell @  apb_pclk  arm-pmuarm,cortex-a7-pmuLMdisplay-subsystemrockchip,display-subsystem*timerarm,armv7-timer00   Tn6oscillator fixed-clockTn6dxin24mwbus_intmem@10080000 mmio-sram   smp-sram@0rockchip,rk3066-smp-sramvop@10118000rockchip,rk3036-vop +d aclk_vopdclk_vophclk_vopuvw axiahbdclk disabledportendpoint@0iommu@10118300rockchip,iommu +vop_mmu disabledinterrupt-controller@10139000 arm,gic-400     usb@101800002rockchip,rk3036-usbrockchip,rk3066-usbsnps,dwc2  otgotg @@ ) disabledusb@101c00002rockchip,rk3036-usbrockchip,rk3066-usbsnps,dwc2  otghost disabledethernet@10200000#rockchip,rk3036-emacsnps,arc-emac @ 3 hclkmacrefmacclk@Pgdqrmiiokayzdefault     ethernet-phy@0  dwmmc@102140000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@@T<4`<4`D biuciu  disableddwmmc@102180000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@<4` Esw biuciuciu_drvciu_sample  disableddwmmc@1021c0000rockchip,rk3036-dw-mshcrockchip,rk3288-dw-mshc!@ T<4`<4` Guy biuciuciu_drvciu_sample rx-tx"/=zdefault  disabledi2s@10220000(rockchip,rk3036-i2srockchip,rk3066-i2s"@ 3 i2s_clki2s_hclkR txrxzdefault disabledclock-controller@20000000rockchip,rk3036-cru 3wG@T#gsyscon@20008000&rockchip,rk3036-grfsysconsimple-mfd reboot-modesyscon-reboot-modeipRB|RBRB RBacodec-ana@20030000 rk3036-codec @3  acodec_pclkq disabledhdmi@20034000rockchip,rk3036-inno-hdmi @@ -h pclk3zdefault disabledportendpoint@0timer@20044000,rockchip,rk3036-timerrockchip,rk3288-timer @   a  timerpclkpwm@20050000(rockchip,rk3036-pwmrockchip,rk2928-pwm ^ pwmzdefault disabledpwm@20050010(rockchip,rk3036-pwmrockchip,rk2928-pwm ^ pwmzdefault disabledpwm@20050020(rockchip,rk3036-pwmrockchip,rk2928-pwm  ^ pwmzdefault disabledpwm@20050030(rockchip,rk3036-pwmrockchip,rk2928-pwm 0^ pwmzdefault disabledi2c@20056000(rockchip,rk3036-i2crockchip,rk3288-i2c `  i2cMzdefaultokayhym8563@51haoyu,hym8563QwTdxin32ki2c@2005a000(rockchip,rk3036-i2crockchip,rk3288-i2c   i2cNzdefault disabledserial@20060000&rockchip,rk3036-uartsnps,dw-apb-uart  Tn6MU baudclkapb_pclkzdefault  disabledserial@20064000&rockchip,rk3036-uartsnps,dw-apb-uart @ Tn6NV baudclkapb_pclkzdefault disabledserial@20068000&rockchip,rk3036-uartsnps,dw-apb-uart  Tn6OW baudclkapb_pclkzdefaultokayi2c@20072000(rockchip,rk3036-i2crockchip,rk3288-i2c    i2cLzdefault  disabledspi@20074000rockchip,rockchip-spi @ RA apb-pclkspi_pclk  txrxzdefault!"#$ disabledpinctrlrockchip,rk3036-pinctrl3gpio0@2007c000rockchip,gpio-bank  $@gpio1@20080000rockchip,gpio-bank  %Agpio2@20084000rockchip,gpio-bank @ &B  pcfg_pull_default&&pcfg-pull-none%%pwm0pwm0-pin%pwm1pwm1-pin%pwm2pwm2-pin%pwm3pwm3-pin%sdmmcsdmmc-clk%sdmmc-cmd&sdmcc-cd&sdmmc-bus1&sdmmc-bus4@&&&&sdiosdio-bus1 &sdio-bus4@ & & &&sdio-cmd&sdio-clk %emmcemmc-clk%emmc-cmd&emmc-bus8&&&&&&&&emacemac-xfer & &&&&&&&  emac-mdio  &&  i2c0i2c0-xfer %%  i2c1i2c1-xfer %%i2c2i2c2-xfer %%i2si2s-bus`&&&&&&hdmihdmi-ctl@% % % %uart0uart0-xfer &%uart0-cts&uart0-rts%uart1uart1-xfer &%uart2uart2-xfer &%spispi-txd&!!spi-rxd&""spi-clk&##spi-cs0&$$spi-cs1& #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2mshc0mshc1mshc2serial0serial1serial2spidevice_typeregenable-methodresetsoperating-pointsclock-latencyclockslinux,phandlerangesinterrupts#dma-cellsarm,pl330-broken-no-flushpclock-namesinterrupt-affinityportsarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsreset-namesiommusstatusremote-endpointinterrupt-names#iommu-cellsinterrupt-controller#interrupt-cellsdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmarockchip,grfassigned-clocksassigned-clock-parentsmax-speedphy-modepinctrl-namespinctrl-0phyphy-reset-gpiosphy-reset-durationclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeeddefault-sample-phasedisable-wpdmasdma-namesmmc-ddr-1_8vnon-removablenum-slots#reset-cellsassigned-clock-ratesoffsetmode-normalmode-recoverymode-bootloadermode-loader#pwm-cellsreg-shiftreg-io-widthgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pins