w8([ timll,omap3-devkit8000ti,omap3 +7TimLL OMAP3 Devkit8000chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/connector0 m/connector1cpus+cpu@0arm,cortex-a8vcpucpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+pinmux_twl4030_pins5AIOpinmux_dss_dpi_pins5IOscm_conf@270sysconsimple-busp0+ p0IOpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapWpbias_mmc_omap2430^pbias_mmc_omap2430mw@-IOclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhIOmcbsp5_fckti,composite-clockIOmcbsp1_mux_fck@4ti,composite-mux-clockI O mcbsp1_fckti,composite-clock IOmcbsp2_mux_fck@4ti,composite-mux-clock I O mcbsp2_fckti,composite-clock IOmcbsp3_mux_fck@68ti,composite-mux-clock hIOmcbsp3_fckti,composite-clock IOmcbsp4_mux_fck@68ti,composite-mux-clock hIOmcbsp4_fckti,composite-clockIOclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+pinmux_twl4030_vpins 5IOaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYIOosc_sys_ck@d40 ti,mux-clock @IOsys_ck@1270ti,divider-clockpIOsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clockIOdpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clockIOwkup_l4_ickfixed-factor-clockIMOMcorex2_d3_fckfixed-factor-clockIOcorex2_d5_fckfixed-factor-clockIOclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockI?O?virt_12m_ck fixed-clockIOvirt_13m_ck fixed-clock]@IOvirt_19200000_ck fixed-clock$IOvirt_26000000_ck fixed-clockIOvirt_38_4m_ck fixed-clockIIOdpll4_ck@d00ti,omap3-dpll-per-clock D 0IOdpll4_m2_ck@d48ti,divider-clock? HIOdpll4_m2x2_mul_ckfixed-factor-clockI O dpll4_m2x2_ck@d00ti,gate-clock   I!O!omap_96m_alwon_fckfixed-factor-clock!I(O(dpll3_ck@d00ti,omap3-dpll-core-clock @ 0IOdpll3_m3_ck@1140ti,divider-clock@I"O"dpll3_m3x2_mul_ckfixed-factor-clock"I#O#dpll3_m3x2_ck@d00ti,gate-clock#   I$O$emu_core_alwon_ckfixed-factor-clock$IaOasys_altclk fixed-clockI-O-mcbsp_clks fixed-clockIOdpll3_m2_ck@d40ti,divider-clock @IOcore_ckfixed-factor-clockI%O%dpll1_fck@940ti,divider-clock% @I&O&dpll1_ck@904ti,omap3-dpll-clock&  $ @ 4IOdpll1_x2_ckfixed-factor-clockI'O'dpll1_x2m2_ck@944ti,divider-clock' DI;O;cm_96m_fckfixed-factor-clock(I)O)omap_96m_fck@d40 ti,mux-clock) @IDODdpll4_m3_ck@e40ti,divider-clock @I*O*dpll4_m3x2_mul_ckfixed-factor-clock*I+O+dpll4_m3x2_ck@d00ti,gate-clock+  I,O,omap_54m_fck@d40 ti,mux-clock,- @I7O7cm_96m_d2_fckfixed-factor-clock)I.O.omap_48m_fck@d40 ti,mux-clock.- @I/O/omap_12m_fckfixed-factor-clock/IFOFdpll4_m4_ck@e40ti,divider-clock @I0O0dpll4_m4x2_mul_ckti,fixed-factor-clock0#1>I1O1dpll4_m4x2_ck@d00ti,gate-clock1  >IOdpll4_m5_ck@f40ti,divider-clock?@I2O2dpll4_m5x2_mul_ckti,fixed-factor-clock2#1>I3O3dpll4_m5x2_ck@d00ti,gate-clock3  >IiOidpll4_m6_ck@1140ti,divider-clock?@I4O4dpll4_m6x2_mul_ckfixed-factor-clock4I5O5dpll4_m6x2_ck@d00ti,gate-clock5  I6O6emu_per_alwon_ckfixed-factor-clock6IbObclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock% pI8O8clkout2_src_mux_ck@d70ti,composite-mux-clock%)7 pI9O9clkout2_src_ckti,composite-clock89I:O:sys_clkout2@d70ti,divider-clock:@ pQmpu_ckfixed-factor-clock;I<O<arm_fck@924ti,divider-clock< $emu_mpu_alwon_ckfixed-factor-clock<IcOcl3_ick@a40ti,divider-clock% @I=O=l4_ick@a40ti,divider-clock= @I>O>rm_ick@c40ti,divider-clock> @gpt10_gate_fck@a00ti,composite-gate-clock  I@O@gpt10_mux_fck@a40ti,composite-mux-clock? @IAOAgpt10_fckti,composite-clock@Agpt11_gate_fck@a00ti,composite-gate-clock  IBOBgpt11_mux_fck@a40ti,composite-mux-clock? @ICOCgpt11_fckti,composite-clockBCcore_96m_fckfixed-factor-clockDIOmmchs2_fck@a00ti,wait-gate-clock IOmmchs1_fck@a00ti,wait-gate-clock IOi2c3_fck@a00ti,wait-gate-clock IOi2c2_fck@a00ti,wait-gate-clock IOi2c1_fck@a00ti,wait-gate-clock IOmcbsp5_gate_fck@a00ti,composite-gate-clock  IOmcbsp1_gate_fck@a00ti,composite-gate-clock  IOcore_48m_fckfixed-factor-clock/IEOEmcspi4_fck@a00ti,wait-gate-clockE IOmcspi3_fck@a00ti,wait-gate-clockE IOmcspi2_fck@a00ti,wait-gate-clockE IOmcspi1_fck@a00ti,wait-gate-clockE IOuart2_fck@a00ti,wait-gate-clockE IOuart1_fck@a00ti,wait-gate-clockE  IOcore_12m_fckfixed-factor-clockFIGOGhdq_fck@a00ti,wait-gate-clockG IOcore_l3_ickfixed-factor-clock=IHOHsdrc_ick@a10ti,wait-gate-clockH IOgpmc_fckfixed-factor-clockHcore_l4_ickfixed-factor-clock>IIOImmchs2_ick@a10ti,omap3-interface-clockI IOmmchs1_ick@a10ti,omap3-interface-clockI IOhdq_ick@a10ti,omap3-interface-clockI IOmcspi4_ick@a10ti,omap3-interface-clockI IOmcspi3_ick@a10ti,omap3-interface-clockI IOmcspi2_ick@a10ti,omap3-interface-clockI IOmcspi1_ick@a10ti,omap3-interface-clockI IOi2c3_ick@a10ti,omap3-interface-clockI IOi2c2_ick@a10ti,omap3-interface-clockI IOi2c1_ick@a10ti,omap3-interface-clockI IOuart2_ick@a10ti,omap3-interface-clockI IOuart1_ick@a10ti,omap3-interface-clockI  IOgpt11_ick@a10ti,omap3-interface-clockI  IOgpt10_ick@a10ti,omap3-interface-clockI  IOmcbsp5_ick@a10ti,omap3-interface-clockI  IOmcbsp1_ick@a10ti,omap3-interface-clockI  IOomapctrl_ick@a10ti,omap3-interface-clockI IOdss_tv_fck@e00ti,gate-clock7IOdss_96m_fck@e00ti,gate-clockDIOdss2_alwon_fck@e00ti,gate-clockIOdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock IJOJgpt1_mux_fck@c40ti,composite-mux-clock? @IKOKgpt1_fckti,composite-clockJKaes2_ick@a10ti,omap3-interface-clockI IOwkup_32k_fckfixed-factor-clock?ILOLgpio1_dbck@c00ti,gate-clockL IOsha12_ick@a10ti,omap3-interface-clockI IOwdt2_fck@c00ti,wait-gate-clockL IOwdt2_ick@c10ti,omap3-interface-clockM IOwdt1_ick@c10ti,omap3-interface-clockM IOgpio1_ick@c10ti,omap3-interface-clockM IOomap_32ksync_ick@c10ti,omap3-interface-clockM IOgpt12_ick@c10ti,omap3-interface-clockM IOgpt1_ick@c10ti,omap3-interface-clockM IOper_96m_fckfixed-factor-clock(I O per_48m_fckfixed-factor-clock/INONuart3_fck@1000ti,wait-gate-clockN IOgpt2_gate_fck@1000ti,composite-gate-clockIOOOgpt2_mux_fck@1040ti,composite-mux-clock?@IPOPgpt2_fckti,composite-clockOPgpt3_gate_fck@1000ti,composite-gate-clockIQOQgpt3_mux_fck@1040ti,composite-mux-clock?@IRORgpt3_fckti,composite-clockQRgpt4_gate_fck@1000ti,composite-gate-clockISOSgpt4_mux_fck@1040ti,composite-mux-clock?@ITOTgpt4_fckti,composite-clockSTgpt5_gate_fck@1000ti,composite-gate-clockIUOUgpt5_mux_fck@1040ti,composite-mux-clock?@IVOVgpt5_fckti,composite-clockUVgpt6_gate_fck@1000ti,composite-gate-clockIWOWgpt6_mux_fck@1040ti,composite-mux-clock?@IXOXgpt6_fckti,composite-clockWXgpt7_gate_fck@1000ti,composite-gate-clockIYOYgpt7_mux_fck@1040ti,composite-mux-clock?@IZOZgpt7_fckti,composite-clockYZgpt8_gate_fck@1000ti,composite-gate-clock I[O[gpt8_mux_fck@1040ti,composite-mux-clock?@I\O\gpt8_fckti,composite-clock[\gpt9_gate_fck@1000ti,composite-gate-clock I]O]gpt9_mux_fck@1040ti,composite-mux-clock?@I^O^gpt9_fckti,composite-clock]^per_32k_alwon_fckfixed-factor-clock?I_O_gpio6_dbck@1000ti,gate-clock_IOgpio5_dbck@1000ti,gate-clock_IOgpio4_dbck@1000ti,gate-clock_IOgpio3_dbck@1000ti,gate-clock_IOgpio2_dbck@1000ti,gate-clock_ IOwdt3_fck@1000ti,wait-gate-clock_ IOper_l4_ickfixed-factor-clock>I`O`gpio6_ick@1010ti,omap3-interface-clock`IOgpio5_ick@1010ti,omap3-interface-clock`IOgpio4_ick@1010ti,omap3-interface-clock`IOgpio3_ick@1010ti,omap3-interface-clock`IOgpio2_ick@1010ti,omap3-interface-clock` IOwdt3_ick@1010ti,omap3-interface-clock` IOuart3_ick@1010ti,omap3-interface-clock` IOuart4_ick@1010ti,omap3-interface-clock`IOgpt9_ick@1010ti,omap3-interface-clock` IOgpt8_ick@1010ti,omap3-interface-clock` IOgpt7_ick@1010ti,omap3-interface-clock`IOgpt6_ick@1010ti,omap3-interface-clock`IOgpt5_ick@1010ti,omap3-interface-clock`IOgpt4_ick@1010ti,omap3-interface-clock`IOgpt3_ick@1010ti,omap3-interface-clock`IOgpt2_ick@1010ti,omap3-interface-clock`IOmcbsp2_ick@1010ti,omap3-interface-clock`IOmcbsp3_ick@1010ti,omap3-interface-clock`IOmcbsp4_ick@1010ti,omap3-interface-clock`IOmcbsp2_gate_fck@1000ti,composite-gate-clockI O mcbsp3_gate_fck@1000ti,composite-gate-clockI O mcbsp4_gate_fck@1000ti,composite-gate-clockIOemu_src_mux_ck@1140 ti,mux-clockabc@IdOdemu_src_ckti,clkdm-gate-clockdIeOepclk_fck@1140ti,divider-clocke@pclkx2_fck@1140ti,divider-clocke@atclk_fck@1140ti,divider-clocke@traceclk_src_fck@1140 ti,mux-clockabc@IfOftraceclk_fck@1140ti,divider-clockf @secure_32k_fck fixed-clockIgOggpt12_fckfixed-factor-clockgwdt1_fckfixed-factor-clockgsecurity_l4_ick2fixed-factor-clock>IhOhaes1_ick@a14ti,omap3-interface-clockh rng_ick@a14ti,omap3-interface-clockh sha11_ick@a14ti,omap3-interface-clockh des1_ick@a14ti,omap3-interface-clockh cam_mclk@f00ti,gate-clocki>cam_ick@f10!ti,omap3-no-wait-interface-clock>IOcsi2_96m_fck@f00ti,gate-clockIOsecurity_l3_ickfixed-factor-clock=IjOjpka_ick@a14ti,omap3-interface-clockj icr_ick@a10ti,omap3-interface-clockI des2_ick@a10ti,omap3-interface-clockI mspro_ick@a10ti,omap3-interface-clockI mailboxes_ick@a10ti,omap3-interface-clockI ssi_l4_ickfixed-factor-clock>IqOqsr1_fck@c00ti,wait-gate-clock sr2_fck@c00ti,wait-gate-clock sr_l4_ickfixed-factor-clock>dpll2_fck@40ti,divider-clock%@IkOkdpll2_ck@4ti,omap3-dpll-clockk$@4gyIlOldpll2_m2_ck@44ti,divider-clocklDImOmiva2_ck@0ti,wait-gate-clockmIOmodem_fck@a00ti,omap3-interface-clock IOsad2d_ick@a10ti,omap3-interface-clock= IOmad2d_ick@a18ti,omap3-interface-clock= IOmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock InOnssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$IoOossi_ssr_fck_3430es2ti,composite-clocknoIpOpssi_sst_fck_3430es2fixed-factor-clockpIOhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockH IOssi_ick_3430es2@a10ti,omap3-ssi-interface-clockq IOusim_gate_fck@c00ti,composite-gate-clockD  I|O|sys_d2_ckfixed-factor-clockIsOsomap_96m_d2_fckfixed-factor-clockDItOtomap_96m_d4_fckfixed-factor-clockDIuOuomap_96m_d8_fckfixed-factor-clockDIvOvomap_96m_d10_fckfixed-factor-clockD IwOwdpll5_m2_d4_ckfixed-factor-clockrIxOxdpll5_m2_d8_ckfixed-factor-clockrIyOydpll5_m2_d16_ckfixed-factor-clockrIzOzdpll5_m2_d20_ckfixed-factor-clockrI{O{usim_mux_fck@c40ti,composite-mux-clock(stuvwxyz{ @I}O}usim_fckti,composite-clock|}usim_ick@c10ti,omap3-interface-clockM  IOdpll5_ck@d04ti,omap3-dpll-clock  $ L 4gyI~O~dpll5_m2_ck@d50ti,divider-clock~ PIrOrsgx_gate_fck@b00ti,composite-gate-clock% IOcore_d3_ckfixed-factor-clock%IOcore_d4_ckfixed-factor-clock%IOcore_d6_ckfixed-factor-clock%IOomap_192m_alwon_fckfixed-factor-clock!IOcore_d2_ckfixed-factor-clock%IOsgx_mux_fck@b40ti,composite-mux-clock ) @IOsgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock= IOcpefuse_fck@a08ti,gate-clock IOts_fck@a08ti,gate-clock? IOusbtll_fck@a08ti,wait-gate-clockr IOusbtll_ick@a18ti,omap3-interface-clockI IOmmchs3_ick@a10ti,omap3-interface-clockI IOmmchs3_fck@a00ti,wait-gate-clock IOdss1_alwon_fck_3430es2@e00ti,dss-gate-clock>IOdss_ick_3430es2@e10ti,omap3-dss-interface-clock>IOusbhost_120m_fck@1400ti,gate-clockrIOusbhost_48m_fck@1400ti,dss-gate-clock/IOusbhost_ick@1410ti,omap3-dss-interface-clock>IOclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainedpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainld2d_clkdmti,clockdomain dpll5_clkdmti,clockdomain~sgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH IOdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `IOgpio@48310000ti,omap3-gpioH1gpio1IOgpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6IOserial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lserial@49020000ti,omap3-uartIJ56txrxuart3li2c@48070000 ti,omap3-i2cH8txrx+i2c1'@twl@48H ti,twl4030defaultaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1m ' 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0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1-=>txrx:GScmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400mti,omap2-iommuH mmu_ispzIOmmu@5d000000mti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 disabledmcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokayIOmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH timer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ohci@48064400ti,ohci-omap3HD Lehci@48064800 ti,ehci-omapHH Mgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+,IOnand@0,0ti,omap2-nand   +sw;LZ,l,~",(6@RR(+x-loader@0 ,X-Loaderbootloaders@80000,U-Bootbootloaders_env@260000 ,U-Boot Env&kernel@280000,Kernel(@filesystem@680000 ,File Systemhethernet@0,0davicom,dm90002 =OaoLZl~066ZZ "usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs9DL dss@48050000 ti,omap3-dssHok dss_corefck+defaultUedispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfckuportendpointIOportendpointIOssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ p ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrx CDssi-port@4805b000ti,omap3-ssi-portHHtxrx EFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+isp@480bc000 ti,omap3-ispH H |Wlports+bandgap@48002524H%$ti,omap34xx-bandgapmemory@80000000vmemoryleds gpio-ledsheartbeat,devkit8000::led1 on heartbeatmmc,devkit8000::led2 onnoneusr,devkit8000::led3 onusrpmu_stat,devkit8000::pmu_stat soundti,omap-twl4030 devkit8000I Ext SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuser,user )encoder0 ti,tfp410 7ports+port@0endpointIOport@1endpointIOconnector0dvi-connector,dviGOportendpointIOconnector1svideo-connector,tvportendpointIO compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display1display2device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsgpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-bus