8(2Freescale i.MX6 DualLite SABRE Smart Device Board!fsl,imx6dl-sabresdfsl,imx6dlchosen9,/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000aliases)8/soc/aips-bus@02100000/ethernet@02188000(B/soc/aips-bus@02000000/flexcan@02090000(G/soc/aips-bus@02000000/flexcan@02094000%L/soc/aips-bus@02000000/gpio@0209c000%R/soc/aips-bus@02000000/gpio@020a0000%X/soc/aips-bus@02000000/gpio@020a4000%^/soc/aips-bus@02000000/gpio@020a8000%d/soc/aips-bus@02000000/gpio@020ac000%j/soc/aips-bus@02000000/gpio@020b0000%p/soc/aips-bus@02000000/gpio@020b4000$v/soc/aips-bus@02100000/i2c@021a0000${/soc/aips-bus@02100000/i2c@021a4000$/soc/aips-bus@02100000/i2c@021a8000/soc/ipu@02400000&/soc/aips-bus@02100000/usdhc@02190000&/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca000$/soc/aips-bus@02100000/i2c@021f8000memorymemory@clocksckil!fsl,imx-ckilfixed-clock ckih1!fsl,imx-ckih1fixed-clock osc!fsl,imx-oscfixed-clock n6soc !simple-bus-dma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 04    ?gpmi0gpmi1gpmi2gpmi3OZgjntgpmi-nand@00112000!fsl,imx6q-gpmi-nand @ |gpmi-nandbch 4?bch(g0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-tx disabledhdmi@0120000 4sg{| iahbisfrokay!fsl,imx6dl-hdmiport@0endpointn2t2port@1endpointn6t6gpu@00130000 !vivante,gc@ 4 gzJbuscoreshadern@t@gpu@00134000 !vivante,gc@@ 4 gy buscoren?t?timer@00a00600!arm,cortex-a9-twd-timer  4 ginterrupt-controller@00a01000!arm,cortex-a9-gicntl2-cache@00a02000!arm,pl310-cache  4\   &7n:t:pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ |dbiconfigpci0-K 4x?msiUh{zyxgpciepcie_buspcie_phyokayvdefault   pmu!arm,cortex-a9-pmu 4^aips-bus@02000000!fsl,aips-bussimple-bus-spba-bus@02000000!fsl,spba-bussimple-bus-spdif@02004000!fsl,imx35-spdif@@ 44   rxtxPgkv>:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ 4gppipgper   rxtxokay  vdefault m25p80@0!st,m25p32jedec,spi-nor1-ecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ 4 gqqipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ 4!grripgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ 4"gssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uart@ 4gipgper   rxtxokayvdefaultesai@02024000!fsl,imx35-esai@@ 43(gvcorememextalfsysspba   rxtx disabledssi@02028000!fsl,imx6q-ssifsl,imx51-ssi@ 4.g ipgbaud  % &rxtx disabledssi@0202c000!fsl,imx6q-ssifsl,imx51-ssi@ 4/g ipgbaud  ) *rxtxokaynEtEssi@02030000!fsl,imx6q-ssifsl,imx51-ssi@ 40g ipgbaud  - .rxtx disabledasrc@02034000!fsl,imx53-asrc@@ 42gkmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`      rxarxbrxctxatxbtxcokayspba@0203c000@vpu@02040000!fsl,imx6dl-vpucnm,coda9604  ?bitjpeggperahb aipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ 4Sg>ipgperokayvdefaultnGtGpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ 4Tg>ipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ 4Ug>ipgper disabledpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ 4Vg>ipgper disabledflexcan@02090000!fsl,imx6q-flexcan @ 4nglmipgper disabledflexcan@02094000!fsl,imx6q-flexcan @@ 4ognoipgper disabledgpt@02098000!fsl,imx6dl-gpt @ 47gwxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @4BC 0@<   {y~zn%t%gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @4DE 0<JIHGFEDOvuqn't'gpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@4FG 0@<ai cQnAtAgpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @4HI 0<     '8=.n t gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @4JK 0<xML/ 9%$#&gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @4LM 0 <K   Nn.t.gpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@4NO 0<   n t kpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ 4Rg> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ 4Pg disabledwdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ 4QgokayvdefaultHccm@020c4000!fsl,imx6q-ccm @@4WX]!"mntanatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $416ntregulator-1p1!fsl,anatop-regulatorvdd1p1 5& 59regulator-3p0!fsl,anatop-regulatorvdd3p0*0 &( 93@regulator-2p5!fsl,anatop-regulatorvdd2p5)00&9)0regulator-vddcore!fsl,anatop-regulatorvddarm  @Lpd{& 9 n;t;regulator-vddpu!fsl,anatop-regulatorvddpu  @ Lpd{& 9 ntregulator-vddsoc!fsl,anatop-regulatorvddsoc  @Lpd{& 9 n<t<tempmon!fsl,imx6q-tempmon 41gusbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  4,gntusbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  4-gn"t"snvs@020cc000#!fsl,sec-v4.0-monsysconsimple-mfd @ntsnvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp44snvs-poweroff!syscon-poweroff8c`okayepit@020d0000 @ 48epit@020d4000 @@ 49src@020d8000!fsl,imx6q-srcfsl,imx51-src @4[`ntgpc@020dc000!fsl,imx6q-gpc @4YZ0gzJyntiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8ntiomuxc@020e0000!fsl,imx6dl-iomuxc@vdefaultntimx6qdl-sabresdhoggrplptx 0pX\,ntaudmuxgrp`0t0x|0n/t/ecspi1grp`H0X@D,\Dn t enetgrp000000000 0$0(0 @n$t$gpio_keysgrpHxH,0nDtDi2c1grp0l@h@n*t*i2c2grp0P8p@dLt@n,t,i2c3grp0(x@4|@n-t-pciegrpn t pciereggrpP nCtCpwm1grpntuart1grp0L`PdntusbotggrppYn!t!usdhc2grppY 0YpYpYpYpY|pYpYpYpYn&t&usdhc3grppY  4YpYpYpY pY$ pY(pY,pY0pYn(t(usdhc4grp<$pY8 8Y@(pYD,pYH0pYL4pYP8pYT<pYX@pY\DpYn)t)wdoggrpntgpio_ledsgpioledsgrp$nHtHldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldbokay0g!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0 disabledport@0endpointn4t4port@1endpointn8t8lvds-channel@1okayspwg"port@0endpointn5t5port@1endpointn9t9port@4endpointnJtJdcic@020e4000@@ 4|dcic@020e8000@ 4}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ 4gipgahbO1imx/sdma/sdma-imx6q.binn t pxp@020f0000@ 4bepdc@020f4000@@ 4alcdif@020f8000@ 4'aips-bus@02100000!fsl,aips-bussimple-bus-caam@2100000 !fsl,sec-v4.0J - gmemaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ring 4ijr1@2000!fsl,sec-v4.0-job-ring  4jaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ 4+gVam~okay vdefault!usb@02184200!fsl,imx6q-usbfsl,imx27-usbB 4(gV"ahostm~okay#usb@02184400!fsl,imx6q-usbfsl,imx27-usbD 4)gahostm~ disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF 4*gahostm~ disabledusbmisc@02184800!fsl,imx6q-usbmiscHgntethernet@02188000!fsl,imx6q-fec@ vwguu ipgahbptpokayvdefault$rgmii %mlb@0218c000@$45u~usdhc@02190000!fsl,imx6q-usdhc@ 4g ipgahbper  disabledusdhc@02194000!fsl,imx6q-usdhc@@ 4g ipgahbper okayvdefault& ' 'usdhc@02198000!fsl,imx6q-usdhc@ 4g ipgahbper okayvdefault( ' 'usdhc@0219c000!fsl,imx6q-usdhc@ 4g ipgahbper okayvdefault)%3i2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ 4$g}okay vdefault*wm8962@1a !wlf,wm8962g<+I+V+b+o+}+++nFtFi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ 4%g~okay vdefault,ntpfuze100@08 !fsl,pfuze100regulatorssw1ab8jsw1c8jsw2 52Zjsw3a"sw3b"sw4 52ZswbstLK@N0nBtBvsnvsB@-vrefddrvgen1 5vgen2 5vgen3w@2Zvgen4w@2Zvgen5w@2Zvgen6w@2Zi2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ 4&gokay vdefault-egalax_ts@04!eeti,egalax_ts.4 .romcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ 4gocotp@021bc000!fsl,imx6q-ocotpsyscon@gnttzasc@021d0000@ 4ltzasc@021d4000@@ 4maudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@okayvdefault/mipi@021dc000@mipi@021e0000@ disabledportsport@0endpoint0n3t3port@1endpoint1n7t7vdoa@021e4000@@ 4serial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ 4gipgper   rxtx disabledserial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ 4gipgper   rxtx disabledserial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ 4gipgper   rxtx disabledserial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ 4gipgper  ! "rxtx disabledi2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c@ 4#gt disabledipu@02400000!fsl,imx6q-ipu@@4g busdi0di1 port@0port@1port@2n=t=disp0-endpointhdmi-endpoint2ntmipi-endpoint3n0t0lvds0-endpoint4ntlvds1-endpoint5ntport@3n>t>disp1-endpointhdmi-endpoint6ntmipi-endpoint7n1t1lvds0-endpoint8ntlvds1-endpoint9ntsram@00900000 !mmio-sramgntcpuscpu@0!arm,cortex-a9cpu:2  02  !l(gh)armpll2_pfd2_396msteppll1_swpll1_sys/;:<cpu@1!arm,cortex-a9cpu:display-subsystem!fsl,imx-display-subsystemE=>gpu-subsystem!fsl,imx-gpu-subsystemK?@regulators !simple-busregulator@0!regulator-fixed usb_otg_vbusLK@LK@ AQdBn t regulator@1!regulator-fixed usb_h1_vbusLK@LK@ %QdBn#t#regulator@2!regulator-fixedwm8962-supply  Qn+t+regulator@3!regulator-fixedvdefaultC MPCIE_3V32Z2Z AQgpio-keys !gpio-keysvdefaultDpower oPower Button Autvolume-up oVolume Up %usvolume-down oVolume Down %ursound.!fsl,imx6q-sabresd-wm8962fsl,imx-audio-wm8962 wm8962-audioEFcHeadphone JackHPOUTLHeadphone JackHPOUTRExt SpkSPKOUTLExt SpkSPKOUTRAMICMICBIASIN3RAMICbacklight-lvds!pwm-backlight GLK@  @okaynItIleds !gpio-ledsvdefaultHred %onpanel!hannstar,hsd100pxn1IportendpointJnt #address-cells#size-cellsmodelcompatiblestdout-pathethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3device_typereg#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclockslinux,phandlereg-namesclock-namesdmasdma-namesstatusgprddc-i2c-busremote-endpointpower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridenum-lanesinterrupt-map-maskinterrupt-mappinctrl-namespinctrl-0reset-gpiofsl,spi-num-chipselectscs-gpiosspi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesfsl,ext-reset-outputassigned-clocksassigned-clock-parentsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatopregmap#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,data-mappingfsl,data-widthfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-modephy-reset-gpiosbus-widthcd-gpioswp-gpiosnon-removableno-1-8-vDCVDD-supplyDBVDD-supplyAVDD-supplyCPVDD-supplyMICVDD-supplyPLLVDD-supplySPKVDD1-supplySPKVDD2-supplygpio-cfgregulator-boot-onregulator-ramp-delaywakeup-gpiosnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportscoresenable-active-highvin-supplylabelwakeup-sourcelinux,codessi-controlleraudio-codecaudio-routingmux-int-portmux-ext-portpwmsbrightness-levelsdefault-brightness-leveldefault-statebacklight