8H(V&aristainetos2 i.MX6 Dual Lite Board 4 !fsl,imx6dlchosenaliases),/soc/aips-bus@02100000/ethernet@02188000(6/soc/aips-bus@02000000/flexcan@02090000(;/soc/aips-bus@02000000/flexcan@02094000%@/soc/aips-bus@02000000/gpio@0209c000%F/soc/aips-bus@02000000/gpio@020a0000%L/soc/aips-bus@02000000/gpio@020a4000%R/soc/aips-bus@02000000/gpio@020a8000%X/soc/aips-bus@02000000/gpio@020ac000%^/soc/aips-bus@02000000/gpio@020b0000%d/soc/aips-bus@02000000/gpio@020b4000$j/soc/aips-bus@02100000/i2c@021a0000$o/soc/aips-bus@02100000/i2c@021a4000$t/soc/aips-bus@02100000/i2c@021a8000y/soc/ipu@02400000&~/soc/aips-bus@02100000/usdhc@02190000&/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca000$/soc/aips-bus@02100000/i2c@021f8000memorymemory@clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6soc !simple-bus!dma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbh 0(    3gpmi0gpmi1gpmi2gpmi3CN[jbhgpmi-nand@00112000!fsl,imx6q-gpmi-nand @ pgpmi-nandbch (3bch([0zgpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txokaydefaulthdmi@0120000 (s[{| ziahbisfr disabled!fsl,imx6dl-hdmiport@0endpointb8h8port@1endpointb<h<gpu@00130000 !vivante,gc@ ( [zJzbuscoreshaderbFhFgpu@00134000 !vivante,gc@@ ( [y zbuscorebEhEtimer@00a00600!arm,cortex-a9-twd-timer  ( [interrupt-controller@00a01000!arm,cortex-a9-gicbhl2-cache@00a02000!arm,pl310-cache  (\   &7b@h@pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcie@ pdbiconfigpci0!K (x3msiUh{zyx[zpciepcie_buspcie_phyokay v pmu!arm,cortex-a9-pmu (^aips-bus@02000000!fsl,aips-bussimple-bus!spba-bus@02000000!fsl,spba-bussimple-bus!spdif@02004000!fsl,imx35-spdif@@ (4   rxtxP[kv>:zcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspi@ ([ppzipgper   rxtxokay$ default display@0 !lg,lg4573 display-timings480x800p57  ; %2portendpoint bMhMecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspi@ ( [qqzipgper   rxtxokay  defaultecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspi@ (![rrzipgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspi@@ ("[sszipgper   rxtxokaydefaultm25p80@1 !micron,n25q128a11jedec,spi-nor1-serial@02020000!fsl,imx6q-uartfsl,imx21-uart@ ([zipgper   rxtxokaydefault?esai@02024000O!fsl,imx35-esai@@ (3([vzcorememextalfsysspba   rxtx disabledssi@02028000O!fsl,imx6q-ssifsl,imx51-ssi@ (.[ zipgbaud  % &rxtx` disabledssi@0202c000O!fsl,imx6q-ssifsl,imx51-ssi@ (/[ zipgbaud  ) *rxtx` disabledssi@02030000O!fsl,imx6q-ssifsl,imx51-ssi@ (0[ zipgbaud  - .rxtx` disabledasrc@02034000!fsl,imx53-asrc@@ (2[kzmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`      rxarxbrxctxatxbtxco}okayspba@0203c000@vpu@02040000!fsl,imx6dl-vpucnm,coda960(  3bitjpeg[zperahbaipstz@0207c000@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwm@ (S[>zipgperokaydefaultbGhGpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwm@@ (T[>zipgper disabledpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwm@ (U[>zipgper disabledpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwm@ (V[>zipgper disabledflexcan@02090000!fsl,imx6q-flexcan @ (n[lmzipgperokaydefaultflexcan@02094000!fsl,imx6q-flexcan @@ (o[nozipgperokaydefaultgpt@02098000!fsl,imx6dl-gpt @ (7[wxzipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpio @(BC@   {y~zb+h+gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpio @(DEJIHGFEDOvuqb h gpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpio @@(FG@ai cQbhgpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpio @(HI     '8=.b h gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpio @(JKxML/ 9%$#&bhgpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpio @(LM K   NbHhHgpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpio @@(NO   b)h)kpp@020b8000!fsl,imx6q-kppfsl,imx21-kpp @ (R[> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdt @ (P[wdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdt @ (Q[ disabledccm@020c4000!fsl,imx6q-ccm @@(WXbhanatop@020c8000#!fsl,imx6q-anatopsysconsimple-bus $(16bhregulator-1p1!fsl,anatop-regulatorvdd1p1 5 0EZm 5regulator-3p0!fsl,anatop-regulatorvdd3p0*0  0EZm( 3@regulator-2p5!fsl,anatop-regulatorvdd2p5)0 00EZm)0regulator-vddcore!fsl,anatop-regulatorvddarm   @0EpZm  bAhAregulator-vddpu!fsl,anatop-regulatorvddpu  @0 EpZm  bhregulator-vddsoc!fsl,anatop-regulatorvddsoc   @0EpZm  bBhBtempmon!fsl,imx6q-tempmon (1[usbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphy  (,[b"h"usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphy  (-[b&h&snvs@020cc000#!fsl,sec-v4.0-monsysconsimple-mfd @bhsnvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp)4(snvs-poweroff!syscon-poweroff)8c` disabledepit@020d0000 @ (8epit@020d4000 @@ (9src@020d8000!fsl,imx6q-srcfsl,imx51-src @([`$bhgpc@020dc000!fsl,imx6q-gpc @(YZ10[zJy;bhiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsyscon8bhiomuxc@020e0000!fsl,imx6dl-iomuxc@defaultbhaudmux`Otx|b0h0ecspi1grpOHLD\DL4`Hb h ecspi2grpxO< @bhecspi4grpOX(\,tDxH4\DbhenetgrphO $(b(h(flexcan1grp0O bhflexcan2grp0Obhgpiogrp8O|dh0(,,D,(bhgpmi-nandhOpXlTt\<$8 lptx|bhi2c1grp0Ol@h@b-h-i2c2grp0OP8p@dLt@b.h.i2c3grp0O0x@4|@b/h/i2c4grp0O8@< @b6h6pwm1grp0O@8bhuart1grp`OL`PdT$P bhuart2grp0Ol<p@ b3h3uart3grp`Od4h8 P `0b4h4uart4grp0OD,X@ b5h5usbotggrpOpYb%h%aristainetos-usbh1-vbusO 0bIhIaristainetos-usbotg-vbusOhP0bJhJusdhc1grpOpY (YpYpYpYpYb*h*usdhc2grpOq 0qqqqq4 H0b,h,ipudisp1grpO1   bKhKldb@020e0008!fsl,imx6q-ldbfsl,imx53-ldb disabled0[!"'((zdi0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0 disabledport@0endpointb:h:port@1endpointb>h>lvds-channel@1 disabledport@0endpoint b;h;port@1endpoint!b?h?dcic@020e4000@@ (|dcic@020e8000@ (}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdma@ ([zipgahbCXimx/sdma/sdma-imx6q.binb h pxp@020f0000@ (bepdc@020f4000@@ (alcdif@020f8000@ ('aips-bus@02100000!fsl,aips-bussimple-bus!caam@2100000 !fsl,sec-v4.0q ! [zmemaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ring (ijr1@2000!fsl,sec-v4.0-job-ring  (jaipstz@0217c000@usb@02184000!fsl,imx6q-usbfsl,imx27-usb@ (+[}"#okay$default%hostusb@02184200!fsl,imx6q-usbfsl,imx27-usbB (([}&#hostokay'usb@02184400!fsl,imx6q-usbfsl,imx27-usbD ()[#host disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbF (*[#host disabledusbmisc@02184800!fsl,imx6q-usbmiscH[b#h#ethernet@02188000!fsl,imx6q-fec@ vw[uu zipgahbptpokaydefault(rgmii  )0=JWmlb@0218c000@$(5u~usdhc@02190000!fsl,imx6q-usdhc@ ([ zipgahbperdokaydefault* n+wusdhc@02194000!fsl,imx6q-usdhc@@ ([ zipgahbperdokaydefault, n   wusdhc@02198000!fsl,imx6q-usdhc@ ([ zipgahbperd disabledusdhc@0219c000!fsl,imx6q-usdhc@ ([ zipgahbperd disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2c@ ($[}okaydefault-pmic@58 !dlg,da9063X+(regulatorsbcore1bcore1 2Zbcore2bcore2 2Zbprobpro 2Zbperibperi 2Zbmembmem 2Zldo2ldo2 w@ldo3ldo3 2Zldo4ldo4 2Zldo5ldo5 2Zldo6ldo6 2Zldo7ldo7 2Zldo8ldo8 2Zldo9ldo9 2Zldo10ldo10 2Zldo11ldo11 2Zbiobio w@w@tmp103@71 !ti,tmp103qi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2c@@ (%[~okaydefault.i2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2c@ (&[okaydefault/tca6416@20 !ti,tca6416 rtc@68!dallas,m41t00htouch@4b!atmel,maxtouchK ( romcp@021ac000@mmdc@021b0000!fsl,imx6q-mmdc@mmdc@021b4000@@weim@021b8000!fsl,imx6q-weim@ ([ocotp@021bc000!fsl,imx6q-ocotpsyscon@[bhtzasc@021d0000@ (ltzasc@021d4000@@ (maudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmux@okaydefault0mipi@021dc000@mipi@021e0000@ disabledportsport@0endpoint1b9h9port@1endpoint2b=h=vdoa@021e4000@@ (serial@021e8000!fsl,imx6q-uartfsl,imx21-uart@ ([zipgper   rxtxokaydefault3serial@021ec000!fsl,imx6q-uartfsl,imx21-uart@ ([zipgper   rxtxokaydefault4?serial@021f0000!fsl,imx6q-uartfsl,imx21-uart@ ([zipgper   rxtxokaydefault5serial@021f4000!fsl,imx6q-uartfsl,imx21-uart@@ ([zipgper  ! "rxtx disabledi2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2c@ (#[tokaydefault6eeprom@50 !atmel,24c64Peeprom@57 !atmel,24c64Wipu@02400000!fsl,imx6q-ipu@@([ zbusdi0di1port@0port@1port@2bChCdisp0-endpoint7bLhLhdmi-endpoint8bhmipi-endpoint9b1h1lvds0-endpoint:bhlvds1-endpoint;b h port@3bDhDdisp1-endpointhdmi-endpoint<bhmipi-endpoint=b2h2lvds0-endpoint>bhlvds1-endpoint?b!h!sram@00900000 !mmio-sram[bhcpuscpu@0!arm,cortex-a9cpu@2  02  l([h)zarmpll2_pfd2_396msteppll1_swpll1_sysA1Bcpu@1!arm,cortex-a9cpu@display-subsystem!fsl,imx-display-subsystemCDgpu-subsystem!fsl,imx-gpu-subsystemEFbacklight!pwm-backlight GLK@  @  $Hregulators !simple-bus2p5v!regulator-fixed2P5V&%&% 3p3v!regulator-fixed3P3V2Z2Z usb-h1-vbus!regulator-fixed1 |+defaultI usb_h1_vbusLK@LK@b'h'usb-otg-vbus!regulator-fixed1 | defaultJ usb_otg_vbusLK@LK@b$h$display@di0!fsl,imx-parallel-displayDrgb24defaultKport@0endpointLb7h7port@1endpointMb h  #address-cells#size-cellsmodelcompatibleethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3device_typereg#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclockslinux,phandlereg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0gprremote-endpointpower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridenum-lanesinterrupt-map-maskinterrupt-mapreset-gpiofsl,spi-num-chipselectscs-gpiosspi-max-frequencypower-on-delaynative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activeuart-has-rtscts#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatopregmap#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedphy-modephy-reset-gpiostxd0-skew-pstxd1-skew-pstxd2-skew-pstxd3-skew-psbus-widthcd-gpiosno-1-8-vwp-gpiosnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportscorespwmsbrightness-levelsdefault-brightness-levelenable-gpiosenable-active-highinterface-pix-fmt