X8Sl(TS4 4,samsung,smdk5410samsung,exynos5410samsung,exynos5+7Samsung SMDK5410 board based on EXYNOS5410soc ,simple-bus =syscon-poweroff,syscon-poweroffDK3 RRsyscon-reboot,syscon-rebootDKRchipid@10000000,samsung,exynos4210-chipidWmemory-controller@12250000,samsung,exynos4210-sromW% @=[defaultiethernet@3,0 ,smsc,lan9115 Wsmii|  interrupt-controller@10440000,samsung,exynos4210-combiner WD| $ * interrupt-controller@10481000%,arm,cortex-a15-gicarm,cortex-a9-gic WHH H@ H`  | $*syscon@10050000,samsung,exynos5-sysregsysconWP$*serial@12C00000,samsung,exynos4210-uartW |329uartclk_uart_baud0Eokayserial@12C10000,samsung,exynos4210-uartW |429uartclk_uart_baud0Eokayserial@12C20000,samsung,exynos4210-uartW |529uartclk_uart_baud0Eokayserial@12C30000,samsung,exynos4210-uartW |629uartclk_uart_baud0i2c@12C60000,samsung,s3c2440-i2cW |8 L Edisabled29i2c[defaultii2c@12C70000,samsung,s3c2440-i2cW |9 L Edisabled29i2c[defaulti i2c@12C80000,samsung,s3c2440-i2cW |: L Edisabled29i2c[defaulti i2c@12C90000,samsung,s3c2440-i2cW |; L Edisabled29i2c[defaulti pwm@12DD0000,samsung,exynos4210-pwmWcw29timersrtc@101E0000,samsung,s3c6410-rtcW|+, Edisabled2=9rtcfimd@14400000,samsung,exynos5250-fimd W@fifovsynclcd_sys| Edisableddp-controller@145B0000,samsung,exynos5-dpW[|    Edisabledsysram@02020000 ,mmio-sramW@  =@smp-sysram@0,samsung,exynos4210-sysramWsmp-sysram@53000,samsung,exynos4210-sysram-nsW0mct@101c0000,samsung,exynos4210-mctW  0|  2; 9fin_pllmctmct-map     xyz{   $ * watchdog@101d0000,samsung,exynos5420-wdtW |*2< 9watchdogsss@10830000,samsung,exynos4210-secssW |p29secssi2c@12ca0000,samsung,exynos5250-hsi2cW |<  Edisabled2 9hsi2c[defaultii2c@12cb0000,samsung,exynos5250-hsi2cW |=  Edisabled2 9hsi2c[defaultii2c@12cc0000,samsung,exynos5250-hsi2cW |>  Edisabled2 9hsi2c[defaultii2c@12cd0000,samsung,exynos5250-hsi2cW |?  Edisabled2 9hsi2c[defaultiusb3-0,samsung,exynos5250-dwusb3 =2n 9usbdrd30dwc3@12000000 ,snps,dwc3W |Husb2-phyusb3-phyphy@12100000,samsung,exynos5420-usbdrd-phyW2n9phyref$*usb3-1,samsung,exynos5250-dwusb3 =2o 9usbdrd30dwc3@12400000 ,snps,dwc3W@usb2-phyusb3-phy |phy@12500000,samsung,exynos5420-usbdrd-phyWP2o9phyref$*usb@12110000,samsung,exynos4210-ehciW |G 2m9usbhostport@0Wusb@12120000,samsung,exynos4210-ohciW |G 2m9usbhostport@0Wphy@12130000,samsung,exynos5250-usb2-phyW2m9phyrefL$*system-controller@10040000,samsung,exynos5410-pmusysconWP 9clkout162 $*clock-controller@10010000,samsung,exynos5410-clockW $*tmu@10060000,samsung,exynos5420-tmuW |A2> 9tmu_apbif->\z7(dU2%$*tmu@10064000,samsung,exynos5420-tmuW@ |2> 9tmu_apbif->\z7(dU2%$*tmu@10068000,samsung,exynos5420-tmuW |2> 9tmu_apbif->\z7(dU2%$*tmu@1006c000,samsung,exynos5420-tmuW |2> 9tmu_apbif->\z7(dU2%$*mmc@12200000,samsung,exynos5250-dw-mshcW  |K 2_9biuciu:EokayEOak}mmc@12210000,samsung,exynos5250-dw-mshcW! |L 2`9biuciu: Edisabledmmc@12220000,samsung,exynos5250-dw-mshcW" |M 2a9biuciu:EokayEk}pinctrl@13400000,samsung,exynos5410-pinctrlW@ |-wakeup-interrupt-controller,samsung,exynos4210-wakeup-eint | gpa0gpa1gpa2gpb0gpb1gpb2gpb3gpc0gpc3gpc1gpc2gpm5gpd1gpe0gpe1gpf0gpf1gpg0gpg1gpg2gph0gph1gpm7gpy0gpy1gpy2gpy3gpy4gpy5gpy6gpy7gpx0 @|$*gpx1 @|gpx2gpx3uart0-data gpa0-0gpa0-1/?uart0-fctl gpa0-2gpa0-3/?uart1-data gpa0-4gpa0-5/?uart1-fctl gpa0-6gpa0-7/?i2c2-bus gpa0-6gpa0-7/?$ * uart2-data gpa1-0gpa1-1/?uart2-fctl gpa1-2gpa1-3/?i2c3-bus gpa1-2gpa1-3/?$ * uart3-data gpa1-4gpa1-5/?i2c4-hs-bus gpa2-0gpa2-1/?$*i2c5-hs-bus gpa2-2gpa2-3/?$*i2c6-hs-bus gpb1-3gpb1-4/?$*pwm0-out gpb2-0/?pwm1-out gpb2-1/?pwm2-out gpb2-2/?pwm3-out gpb2-3/?i2c7-hs-bus gpb2-2gpb2-3/?$*i2c0-bus gpb3-0gpb3-1/?$*i2c1-bus gpb3-2gpb3-3/?$ * sd0-clk gpc0-0/?sd0-cmd gpc0-1/?sd0-cd gpc0-2/?sd0-bus-width1 gpc0-3/?sd0-bus-width4 gpc0-4gpc0-5gpc0-6/?sd2-clk gpc2-0/?sd2-cmd gpc2-1/?sd2-cd gpc2-2/?sd2-bus-width1 gpc2-3/?sd2-bus-width4 gpc2-4gpc2-5gpc2-6/?sd0-bus-width8 gpc3-0gpc3-1gpc3-2gpc3-3/?srom-ctl1 gpy0-3gpy0-4gpy0-5gpy1-0gpy1-1gpy1-2gpy1-3?$*srom-ebi gpy3-0gpy3-1gpy3-2gpy3-3gpy3-4gpy3-5gpy3-6gpy3-7gpy5-0gpy5-1gpy5-2gpy5-3gpy5-4gpy5-5gpy5-6gpy5-7gpy6-0gpy6-1gpy6-2gpy6-3gpy6-4gpy6-5gpy6-6gpy6-7/?$*pinctrl@14000000,samsung,exynos5410-pinctrlW |.gpj0gpj1gpj2gpj3gpj4gpk0gpk1gpk2gpk3pinctrl@10d10000,samsung,exynos5410-pinctrlW |2gpv0gpv1gpv2gpv3gpv4pinctrl@03860000,samsung,exynos5410-pinctrlW |/gpzaliasesO/soc/i2c@12C60000T/soc/i2c@12C70000Y/soc/i2c@12C80000^/soc/i2c@12C90000c/soc/serial@12C00000k/soc/serial@12C10000s/soc/serial@12C20000{/soc/serial@12C30000/soc/i2c@12ca0000/soc/i2c@12cb0000/soc/i2c@12cc0000/soc/i2c@12cd0000/soc/phy@12100000/soc/phy@12500000/soc/pinctrl@13400000/soc/pinctrl@14000000/soc/pinctrl@10d10000/soc/pinctrl@03860000cpus cpu@0cpu,arm,cortex-a15W_^cpu@1cpu,arm,cortex-a15W_^cpu@2cpu,arm,cortex-a15W_^cpu@3cpu,arm,cortex-a15W_^thermal-zonescpu0-thermaltripscpu-alert-0!L-'5activecpu-alert-1!X-'5activecpu-alert-2!-'5activecpu-crit-0!- 5criticalcpu1-thermaltripscpu-alert-0!L-'5activecpu-alert-1!X-'5activecpu-alert-2!-'5activecpu-crit-0!- 5criticalcpu2-thermaltripscpu-alert-0!L-'5activecpu-alert-1!X-'5activecpu-alert-2!-'5activecpu-crit-0!- 5criticalcpu3-thermaltripscpu-alert-0!L-'5activecpu-alert-1!X-'5activecpu-alert-2!-'5activecpu-crit-0!- 5criticalmemory@40000000memoryW@chosen8console=ttySAC2,115200xxti ,fixed-clockn6Afin_pll $*firmware@02037000,samsung,secure-firmwareWp interrupt-parent#address-cells#size-cellscompatiblemodelrangesregmapoffsetmaskregpinctrl-namespinctrl-0phy-modeinterruptsreg-io-widthsmsc,irq-push-pullsmsc,force-internal-physamsung,srom-page-modesamsung,srom-timing#interrupt-cellsinterrupt-controllersamsung,combiner-nrlinux,phandleclocksclock-namesstatussamsung,sysreg-phandlesamsung,pwm-outputs#pwm-cellsinterrupt-namessamsung,sysreginterrupt-mapsamsung,syscon-phandlephysphy-names#phy-cellssamsung,pmu-sysconsamsung,pmureg-phandle#clock-cells#thermal-sensor-cellssamsung,tmu_gainsamsung,tmu_reference_voltagesamsung,tmu_noise_cancel_modesamsung,tmu_efuse_valuesamsung,tmu_min_efuse_valuesamsung,tmu_max_efuse_valuesamsung,tmu_first_point_trimsamsung,tmu_second_point_trimsamsung,tmu_default_temp_offsetsamsung,tmu_cal_typefifo-depthnum-slotscap-mmc-highspeedbroken-cdcard-detect-delaysamsung,dw-mshc-ciu-divsamsung,dw-mshc-sdr-timingsamsung,dw-mshc-ddr-timingbus-widthcap-sd-highspeeddisable-wpgpio-controller#gpio-cellssamsung,pinssamsung,pin-functionsamsung,pin-pudsamsung,pin-drvi2c0i2c1i2c2i2c3serial0serial1serial2serial3i2c4i2c5i2c6i2c7usbdrdphy0usbdrdphy1pinctrl0pinctrl1pinctrl2pinctrl3device_typeclock-frequencythermal-sensorspolling-delay-passivepolling-delaytemperaturehysteresisbootargsclock-output-names