˕8(!ti,am3517-evmti,am3517ti,omap3 +&7TI AM3517 EVM (AM3517/05 TMDSEVM3517)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@4809e000cpus+cpu@0arm,cortex-a8lcpux|cpupmu@54000000arm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busx + pinmux@30 ti,omap3-padconfpinctrl-singlex08+scm_conf@270sysconsimple-busxp0+ p0!'pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapx/pbias_mmc_omap24306pbias_mmc_omap2430Ew@]-!'clocks+mcbsp5_mux_fck@68uti,composite-mux-clock|xh!'mcbsp5_fckuti,composite-clock|!'mcbsp1_mux_fck@4uti,composite-mux-clock|x! ' mcbsp1_fckuti,composite-clock| !'mcbsp2_mux_fck@4uti,composite-mux-clock| x! ' mcbsp2_fckuti,composite-clock| !'mcbsp3_mux_fck@68uti,composite-mux-clock| xh!'mcbsp3_fckuti,composite-clock| !'mcbsp4_mux_fck@68uti,composite-mux-clock| xh!'mcbsp4_fckuti,composite-clock|!'emac_ick@32cuti,am35xx-gate-clock|x,!x'xemac_fck@32cuti,gate-clock|x, vpfe_ick@32cuti,am35xx-gate-clock|x,!y'yvpfe_fck@32cuti,gate-clock|x, hsotgusb_ick_am35xx@32cuti,am35xx-gate-clock|x,!z'zhsotgusb_fck_am35xx@32cuti,gate-clock|x,!{'{hecc_ck@32cuti,am35xx-gate-clock|x,!|'|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+aes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocks+virt_16_8m_cku fixed-clockY!'osc_sys_ck@d40u ti,mux-clock|x @!'sys_ck@1270uti,divider-clock|xp!'sys_clkout1@d70uti,gate-clock|x pdpll3_x2_ckufixed-factor-clock|dpll3_m2x2_ckufixed-factor-clock|! ' dpll4_x2_ckufixed-factor-clock|corex2_fckufixed-factor-clock| !!'!wkup_l4_ickufixed-factor-clock|!P'Pcorex2_d3_fckufixed-factor-clock|!!q'qcorex2_d5_fckufixed-factor-clock|!!r'rclockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclku fixed-clockomap_32k_fcku fixed-clock!B'Bvirt_12m_cku fixed-clock!'virt_13m_cku fixed-clock]@!'virt_19200000_cku fixed-clock$!'virt_26000000_cku fixed-clock!'virt_38_4m_cku fixed-clockI!'dpll4_ck@d00uti,omap3-dpll-per-clock|x D 0!'dpll4_m2_ck@d48uti,divider-clock|?x H!"'"dpll4_m2x2_mul_ckufixed-factor-clock|"!#'#dpll4_m2x2_ck@d00uti,gate-clock|#x !$'$omap_96m_alwon_fckufixed-factor-clock|$!+'+dpll3_ck@d00uti,omap3-dpll-core-clock|x @ 0!'dpll3_m3_ck@1140uti,divider-clock|x@!%'%dpll3_m3x2_mul_ckufixed-factor-clock|%!&'&dpll3_m3x2_ck@d00uti,gate-clock|& x !'''emu_core_alwon_ckufixed-factor-clock|'!d'dsys_altclku fixed-clock!0'0mcbsp_clksu fixed-clock!'dpll3_m2_ck@d40uti,divider-clock|x @!'core_ckufixed-factor-clock|!('(dpll1_fck@940uti,divider-clock|(x @!)')dpll1_ck@904uti,omap3-dpll-clock|)x  $ @ 4!'dpll1_x2_ckufixed-factor-clock|!*'*dpll1_x2m2_ck@944uti,divider-clock|*x D!>'>cm_96m_fckufixed-factor-clock|+!,',omap_96m_fck@d40u ti,mux-clock|,x @!G'Gdpll4_m3_ck@e40uti,divider-clock| x@!-'-dpll4_m3x2_mul_ckufixed-factor-clock|-!.'.dpll4_m3x2_ck@d00uti,gate-clock|.x !/'/omap_54m_fck@d40u ti,mux-clock|/0x @!:':cm_96m_d2_fckufixed-factor-clock|,!1'1omap_48m_fck@d40u ti,mux-clock|10x @!2'2omap_12m_fckufixed-factor-clock|2!I'Idpll4_m4_ck@e40uti,divider-clock| x@!3'3dpll4_m4x2_mul_ckuti,fixed-factor-clock|3 !4'4dpll4_m4x2_ck@d00uti,gate-clock|4x !v'vdpll4_m5_ck@f40uti,divider-clock|?x@!5'5dpll4_m5x2_mul_ckuti,fixed-factor-clock|5 !6'6dpll4_m5x2_ck@d00uti,gate-clock|6x dpll4_m6_ck@1140uti,divider-clock|?x@!7'7dpll4_m6x2_mul_ckufixed-factor-clock|7!8'8dpll4_m6x2_ck@d00uti,gate-clock|8x !9'9emu_per_alwon_ckufixed-factor-clock|9!e'eclkout2_src_gate_ck@d70u ti,composite-no-wait-gate-clock|(x p!;';clkout2_src_mux_ck@d70uti,composite-mux-clock|(,:x p!<'<clkout2_src_ckuti,composite-clock|;<!='=sys_clkout2@d70uti,divider-clock|=@x p)mpu_ckufixed-factor-clock|>!?'?arm_fck@924uti,divider-clock|?x $emu_mpu_alwon_ckufixed-factor-clock|?!f'fl3_ick@a40uti,divider-clock|(x @!@'@l4_ick@a40uti,divider-clock|@x @!A'Arm_ick@c40uti,divider-clock|Ax @gpt10_gate_fck@a00uti,composite-gate-clock| x !C'Cgpt10_mux_fck@a40uti,composite-mux-clock|Bx @!D'Dgpt10_fckuti,composite-clock|CDgpt11_gate_fck@a00uti,composite-gate-clock| x !E'Egpt11_mux_fck@a40uti,composite-mux-clock|Bx @!F'Fgpt11_fckuti,composite-clock|EFcore_96m_fckufixed-factor-clock|G!'mmchs2_fck@a00uti,wait-gate-clock|x !'mmchs1_fck@a00uti,wait-gate-clock|x !'i2c3_fck@a00uti,wait-gate-clock|x !'i2c2_fck@a00uti,wait-gate-clock|x !'i2c1_fck@a00uti,wait-gate-clock|x !'mcbsp5_gate_fck@a00uti,composite-gate-clock| x !'mcbsp1_gate_fck@a00uti,composite-gate-clock| x !'core_48m_fckufixed-factor-clock|2!H'Hmcspi4_fck@a00uti,wait-gate-clock|Hx !'mcspi3_fck@a00uti,wait-gate-clock|Hx !'mcspi2_fck@a00uti,wait-gate-clock|Hx !'mcspi1_fck@a00uti,wait-gate-clock|Hx !'uart2_fck@a00uti,wait-gate-clock|Hx !'uart1_fck@a00uti,wait-gate-clock|Hx  !'core_12m_fckufixed-factor-clock|I!J'Jhdq_fck@a00uti,wait-gate-clock|Jx !'core_l3_ickufixed-factor-clock|@!K'Ksdrc_ick@a10uti,wait-gate-clock|Kx !w'wgpmc_fckufixed-factor-clock|Kcore_l4_ickufixed-factor-clock|A!L'Lmmchs2_ick@a10uti,omap3-interface-clock|Lx !'mmchs1_ick@a10uti,omap3-interface-clock|Lx !'hdq_ick@a10uti,omap3-interface-clock|Lx !'mcspi4_ick@a10uti,omap3-interface-clock|Lx !'mcspi3_ick@a10uti,omap3-interface-clock|Lx !'mcspi2_ick@a10uti,omap3-interface-clock|Lx !'mcspi1_ick@a10uti,omap3-interface-clock|Lx !'i2c3_ick@a10uti,omap3-interface-clock|Lx !'i2c2_ick@a10uti,omap3-interface-clock|Lx !'i2c1_ick@a10uti,omap3-interface-clock|Lx !'uart2_ick@a10uti,omap3-interface-clock|Lx !'uart1_ick@a10uti,omap3-interface-clock|Lx  !'gpt11_ick@a10uti,omap3-interface-clock|Lx  !'gpt10_ick@a10uti,omap3-interface-clock|Lx  !'mcbsp5_ick@a10uti,omap3-interface-clock|Lx  !'mcbsp1_ick@a10uti,omap3-interface-clock|Lx  !'omapctrl_ick@a10uti,omap3-interface-clock|Lx !'dss_tv_fck@e00uti,gate-clock|:x!'dss_96m_fck@e00uti,gate-clock|Gx!'dss2_alwon_fck@e00uti,gate-clock|x!'dummy_cku fixed-clockgpt1_gate_fck@c00uti,composite-gate-clock|x !M'Mgpt1_mux_fck@c40uti,composite-mux-clock|Bx @!N'Ngpt1_fckuti,composite-clock|MNaes2_ick@a10uti,omap3-interface-clock|Lx !'wkup_32k_fckufixed-factor-clock|B!O'Ogpio1_dbck@c00uti,gate-clock|Ox !'sha12_ick@a10uti,omap3-interface-clock|Lx !'wdt2_fck@c00uti,wait-gate-clock|Ox !'wdt2_ick@c10uti,omap3-interface-clock|Px !'wdt1_ick@c10uti,omap3-interface-clock|Px !'gpio1_ick@c10uti,omap3-interface-clock|Px !'omap_32ksync_ick@c10uti,omap3-interface-clock|Px !'gpt12_ick@c10uti,omap3-interface-clock|Px !'gpt1_ick@c10uti,omap3-interface-clock|Px !'per_96m_fckufixed-factor-clock|+! ' per_48m_fckufixed-factor-clock|2!Q'Quart3_fck@1000uti,wait-gate-clock|Qx !}'}gpt2_gate_fck@1000uti,composite-gate-clock|x!R'Rgpt2_mux_fck@1040uti,composite-mux-clock|Bx@!S'Sgpt2_fckuti,composite-clock|RSgpt3_gate_fck@1000uti,composite-gate-clock|x!T'Tgpt3_mux_fck@1040uti,composite-mux-clock|Bx@!U'Ugpt3_fckuti,composite-clock|TUgpt4_gate_fck@1000uti,composite-gate-clock|x!V'Vgpt4_mux_fck@1040uti,composite-mux-clock|Bx@!W'Wgpt4_fckuti,composite-clock|VWgpt5_gate_fck@1000uti,composite-gate-clock|x!X'Xgpt5_mux_fck@1040uti,composite-mux-clock|Bx@!Y'Ygpt5_fckuti,composite-clock|XYgpt6_gate_fck@1000uti,composite-gate-clock|x!Z'Zgpt6_mux_fck@1040uti,composite-mux-clock|Bx@!['[gpt6_fckuti,composite-clock|Z[gpt7_gate_fck@1000uti,composite-gate-clock|x!\'\gpt7_mux_fck@1040uti,composite-mux-clock|Bx@!]']gpt7_fckuti,composite-clock|\]gpt8_gate_fck@1000uti,composite-gate-clock| x!^'^gpt8_mux_fck@1040uti,composite-mux-clock|Bx@!_'_gpt8_fckuti,composite-clock|^_gpt9_gate_fck@1000uti,composite-gate-clock| x!`'`gpt9_mux_fck@1040uti,composite-mux-clock|Bx@!a'agpt9_fckuti,composite-clock|`aper_32k_alwon_fckufixed-factor-clock|B!b'bgpio6_dbck@1000uti,gate-clock|bx!~'~gpio5_dbck@1000uti,gate-clock|bx!'gpio4_dbck@1000uti,gate-clock|bx!'gpio3_dbck@1000uti,gate-clock|bx!'gpio2_dbck@1000uti,gate-clock|bx !'wdt3_fck@1000uti,wait-gate-clock|bx !'per_l4_ickufixed-factor-clock|A!c'cgpio6_ick@1010uti,omap3-interface-clock|cx!'gpio5_ick@1010uti,omap3-interface-clock|cx!'gpio4_ick@1010uti,omap3-interface-clock|cx!'gpio3_ick@1010uti,omap3-interface-clock|cx!'gpio2_ick@1010uti,omap3-interface-clock|cx !'wdt3_ick@1010uti,omap3-interface-clock|cx !'uart3_ick@1010uti,omap3-interface-clock|cx !'uart4_ick@1010uti,omap3-interface-clock|cx!'gpt9_ick@1010uti,omap3-interface-clock|cx !'gpt8_ick@1010uti,omap3-interface-clock|cx !'gpt7_ick@1010uti,omap3-interface-clock|cx!'gpt6_ick@1010uti,omap3-interface-clock|cx!'gpt5_ick@1010uti,omap3-interface-clock|cx!'gpt4_ick@1010uti,omap3-interface-clock|cx!'gpt3_ick@1010uti,omap3-interface-clock|cx!'gpt2_ick@1010uti,omap3-interface-clock|cx!'mcbsp2_ick@1010uti,omap3-interface-clock|cx!'mcbsp3_ick@1010uti,omap3-interface-clock|cx!'mcbsp4_ick@1010uti,omap3-interface-clock|cx!'mcbsp2_gate_fck@1000uti,composite-gate-clock|x! ' mcbsp3_gate_fck@1000uti,composite-gate-clock|x! ' mcbsp4_gate_fck@1000uti,composite-gate-clock|x!'emu_src_mux_ck@1140u ti,mux-clock|defx@!g'gemu_src_ckuti,clkdm-gate-clock|g!h'hpclk_fck@1140uti,divider-clock|hx@pclkx2_fck@1140uti,divider-clock|hx@atclk_fck@1140uti,divider-clock|hx@traceclk_src_fck@1140u ti,mux-clock|defx@!i'itraceclk_fck@1140uti,divider-clock|i x@secure_32k_fcku fixed-clock!j'jgpt12_fckufixed-factor-clock|jwdt1_fckufixed-factor-clock|jipss_ick@a10uti,am35xx-interface-clock|Kx !'rmii_cku fixed-clock!'pclk_cku fixed-clock!'uart4_ick_am35xx@a10uti,omap3-interface-clock|Lx uart4_fck_am35xx@a00uti,wait-gate-clock|Hx dpll5_ck@d04uti,omap3-dpll-clock|x  $ L 4?Q!k'kdpll5_m2_ck@d50uti,divider-clock|kx P!u'usgx_gate_fck@b00uti,composite-gate-clock|(x !s'score_d3_ckufixed-factor-clock|(!l'lcore_d4_ckufixed-factor-clock|(!m'mcore_d6_ckufixed-factor-clock|(!n'nomap_192m_alwon_fckufixed-factor-clock|$!o'ocore_d2_ckufixed-factor-clock|(!p'psgx_mux_fck@b40uti,composite-mux-clock |lmn,opqrx @!t'tsgx_fckuti,composite-clock|stsgx_ick@b10uti,wait-gate-clock|@x !'cpefuse_fck@a08uti,gate-clock|x !'ts_fck@a08uti,gate-clock|Bx !'usbtll_fck@a08uti,wait-gate-clock|ux !'usbtll_ick@a18uti,omap3-interface-clock|Lx !'mmchs3_ick@a10uti,omap3-interface-clock|Lx !'mmchs3_fck@a00uti,wait-gate-clock|x !'dss1_alwon_fck_3430es2@e00uti,dss-gate-clock|vx!'dss_ick_3430es2@e10uti,omap3-dss-interface-clock|Ax!'usbhost_120m_fck@1400uti,gate-clock|ux!'usbhost_48m_fck@1400uti,dss-gate-clock|2x!'usbhost_ick@1410uti,omap3-dss-interface-clock|Ax!'clockdomainscore_l3_clkdmti,clockdomain|wxyz{|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainh|}~emu_clkdmti,clockdomain|hdpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain |dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|dpll5_clkdmti,clockdomain|ksgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |counter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH !'dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH` Yd q`!'gpio@48310000ti,omap3-gpioxH1gpio1~gpio@49050000ti,omap3-gpioxIgpio2gpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio4gpio@49056000ti,omap3-gpioxI`!gpio5gpio@49058000ti,omap3-gpioxI"gpio6serial@4806a000ti,omap3-uartxH H12txrxuart1lserial@4806c000ti,omap3-uartxHI34txrxuart2lserial@49020000ti,omap3-uartxIJ56txrxuart3li2c@48070000 ti,omap3-i2cxH8txrx+i2c1i2c@48072000 ti,omap3-i2cxH 9txrx+i2c2i2c@48060000 ti,omap3-i2cxH=txrx+i2c3mailbox@48094000ti,omap3-mailboxmailboxxH @ disableddsp  spi@48098000ti,omap2-mcspixH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1=>txrx!.:mmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx disabledmmu@480bd400Dti,omap2-iommuxH mmu_ispQ disabledmmu@5d000000Dti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@ampu ;< kcommontxrx{mcbsp1 txrx|fck disabledmcbsp@49022000ti,omap3-mcbspxI I ampusidetone>?kcommontxrxsidetone{mcbsp2mcbsp2_sidetone!"txrx|fckick disabledmcbsp@49024000ti,omap3-mcbspxI@I ampusidetoneYZkcommontxrxsidetone{mcbsp3mcbsp3_sidetonetxrx|fckick disabledmcbsp@49026000ti,omap3-mcbspxI`ampu 67 kcommontxrx{mcbsp4txrx|fck disabledmcbsp@48096000ti,omap3-mcbspxH `ampu QR kcommontxrx{mcbsp5txrx|fck disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH  disabledtimer@48318000ti,omap3430-timerxH1%timer1timer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11timer@48304000ti,omap3430-timerxH0@_timer12usbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs+ohci@48064400ti,ohci-omap3xHD Lehci@48064800 ti,ehci-omapxHH Mgpmc@6e000000ti,omap3430-gpmcgpmcxnrxtx+usb_otg_hs@480ab000ti,omap3-musbxH \]kmcdma usb_otg_hs dss@48050000 ti,omap3-dssxH disabled dss_core|fck+dispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H aprotophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  disabled dss_venc|fckssi-controller@48058000 ti,omap3-ssissi disabledxHHasysgddGkgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portxHHatxrx CDssi-port@4805b000ti,omap3-ssi-portxHHatxrx EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hs disabledx\Gkmcethernet@0x5c000000ti,am3517-emac davinci_emacokayx\CDEF/7R k~ethernet@0x5c030000ti,davinci_mdio davinci_mdiookayx\B@+serial@4809e000ti,omap3-uartuart4 disabledxH T76txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singlexH%$+memory@80000000lmemoryxvmmcregulator-fixed 6vmmc_fixedE2Z]2Z!' compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-masklinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extended#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freq