8H( Kgoogle,veyron-pinky-rev2google,veyron-pinkygoogle,veyronrockchip,rk3288& 7Google Pinkychosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelmemorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12h w@\@p@ @@OOa sB@ ~ ' 9 K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba simple-busYdma-controller@ff250000arm,pl330arm,primecell%@`k8 apb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`k8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@`k8 apb_pclkKRQRreserved-memoryYdma-unusable@fe000000oscillator fixed-clockn6xin24mK Q timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc р 8Drvbiuciuciu-driveciu-sample  @okay(2DU g pZ default  dwmmc@ff0d0000rockchip,rk3288-dw-mshc р 8Eswbiuciuciu-driveciu-sample ! @okay(D*5default dwmmc@ff0e0000rockchip,rk3288-dw-mshc р 8Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc р 8Guybiuciuciu-driveciu-sample #@okay(2pCN5defaultsaradc@ff100000rockchip,saradc $]8I[saradcapb_pclkW osaradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclk{  txrx ,default !"#okayec@0google,cros-ec-spi& default$-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @1};0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclk{ txrx -default%&'( disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclk{txrx .default)*+,okay> flash@0jedec,spi-nori2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault-okayQ2idtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault.okayQ2i,i2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault/okayQ2i,ts3a227e@3b ti,ts3a227e;&0default1KQtrackpad@15elan,ekth3000& default23i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault4okayQ,iKdQdserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 567okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault8okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault9okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault: disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault; disabledthermal-zonesreserve_thermal<cpu_thermald<tripscpu_alert0,p8passiveK=Q=cpu_alert1,$8passiveK>Q>cpu_crit,_8 criticalcooling-mapsmap0C= Hmap1C> Hgpu_thermald<tripsgpu_alert0,p8passiveK?Q?gpu_crit,_8 criticalcooling-mapsmap0C? Htsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk otsadc-apbinitdefaultsleep@WAa@ks disabledK<Q<ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqB88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB ostmmaceth disabledusb@ff500000 generic-ehciP 8usbhostCusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otg hostD usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otg host&5@@ DE usb2-phyokayzNEusb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultFokayQ2idpmic@1brockchip,rk808xin32kwifibt_32kin&0defaultGeH3H HKvQvregulatorsDCDC_REG1vdd_arm)=O qg qKQregulator-state-memDCDC_REG2vdd_gpu)=O 5gqKhQhregulator-state-memB@DCDC_REG3 vcc135_ddr)=regulator-state-memDCDC_REG4vcc_18)=Ow@gw@KQregulator-state-memw@LDO_REG1 vcc33_io)=O2Zg2ZK3Q3regulator-state-mem2ZLDO_REG3vdd_10)=OB@gB@regulator-state-memB@LDO_REG7vdd10_lcd_pwren_h)=O&%g&%regulator-state-memSWITCH_REG1 vcc33_lcd)=KPQPregulator-state-memLDO_REG6 vcc18_codec)=Ow@gw@KQQQregulator-state-memLDO_REG4 vccio_sdOw@g2ZKQregulator-state-memLDO_REG5 vcc33_sdO2Zg2ZK Q regulator-state-memLDO_REG8 vcc33_ccd)=O2Zg2Zregulator-state-mem2ZSWITCH_REG2)= vcc18_lcdregulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultIokayQ2i max98090@10maxim,max98090&Jmclk8qdefaultKK~Q~pwm@ff680000rockchip,rk3288-pwmhdefaultL8^pwmokayKQpwm@ff680010rockchip,rk3288-pwmhdefaultM8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultN8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultO8^pwm disabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerhN KUQUpd_vio@9 8chgfdehilkjpd_hevc@11 8oppd_video@12 8pd_gpu@13 8reboot-modesyscon-reboot-modeRBRB!RB 1RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvB=Hjk$#gׄeрxhрxhKQsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwKBQBedp-phyrockchip,rk3288-dp-phy8h24mJokayK`Q`io-domains"rockchip,rk3288-io-voltage-domainokayU3_jx33PQusbphyrockchip,rk3288-usb-phyokayusb-phy@320J 8]phyclkKEQEusb-phy@334J48^phyclkKCQCusb-phy@348JH8_phyclkKDQDwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk8T{Rtx 6defaultSB disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5{RRtxrxi2s_hclki2s_clk8RdefaultTokayK}Q}cypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk ocrypto-rstokayvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop U def oaxiahbdclk VokayportK Q endpoint@0 $WKeQeendpoint@1 $XKaQaendpoint@2 $YK^Q^iommu@ff930300rockchip,iommu  vopb_mmu U  4okayKVQVvop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop U  oaxiahbdclk ZokayportK Q endpoint@0 $[KfQfendpoint@1 $\KbQbendpoint@2 $]K_Q_iommu@ff940300rockchip,iommu  vopl_mmu U  4okayKZQZmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 8~d refpclk U B disabledportsportendpoint@0 $^KYQYendpoint@1 $_K]Q]dp@ff970000rockchip,rk3288-dp@ b8icdppclk`dpoodpBokay Aportsport@0endpoint@0 $aKXQXendpoint@1 $bK\Q\port@1endpoint $cKQhdmi@ff980000rockchip,rk3288-dw-hdmiB g8hm iahbisfr U okay Kdportsportendpoint@0 $eKWQWendpoint@1 $fK[Q[mali@ffa300004rockchip,rk3288-maliarm,mali-t760arm,mali-midgard$ jobmmugpu8 Wg U okay khgpu-opp-tableoperating-points-v2KgQgopp@100000000 w ~~opp@200000000 w  ~~opp@300000000 w ~B@opp@400000000 wׄ ~opp@500000000 we ~Oopp@600000000 w#F ~interrupt-controller@ffc01000 arm,gic-400    @ `   KQefuse@ffb40000rockchip,rockchip-efuse 8q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlBYdefaultsleepijWikgpio0@ff750000rockchip,gpio-banku Q8@    K0Q0gpio1@ff780000rockchip,gpio-bankx R8A    gpio2@ff790000rockchip,gpio-banky S8B    gpio3@ff7a0000rockchip,gpio-bankz T8C    gpio4@ff7b0000rockchip,gpio-bank{ U8D    KyQygpio5@ff7c0000rockchip,gpio-bank| V8E    gpio6@ff7d0000rockchip,gpio-bank} W8F    KJQJgpio7@ff7e0000rockchip,gpio-bank~ X8G    K Q gpio8@ff7f0000rockchip,gpio-bank Y8H    hdmihdmi-ddc llpcfg-pull-up KmQmpcfg-pull-down KnQnpcfg-pull-none KlQlpcfg-pull-none-12ma   KpQpsleepglobal-pwroff lKiQiddrio-pwroff lddr0-retention mddr1-retention medpedp-hpd  ni2c0i2c0-xfer llKFQFi2c1i2c1-xfer llK-Q-i2c2i2c2-xfer  l lKIQIi2c3i2c3-xfer llK.Q.i2c4i2c4-xfer llK/Q/i2c5i2c5-xfer llK4Q4i2s0i2s0-bus` llllllKTQTsdmmcsdmmc-clk oKQsdmmc-cmd oKQsdmmc-cd msdmmc-bus1 msdmmc-bus4@ ooooKQsdmmc-cd-disabled lKQsdmmc-cd-gpio lKQsdmmc-wp-gpio  mKQsdio0sdio0-bus1 msdio0-bus4@ ooooKQsdio0-cmd oKQsdio0-clk oKQsdio0-cd msdio0-wp msdio0-pwr msdio0-bkpwr msdio0-int mwifienable-h lKxQxbt-enable-l lKwQwsdio1sdio1-bus1 msdio1-bus4@ mmmmsdio1-cd msdio1-wp msdio1-bkpwr msdio1-int msdio1-cmd msdio1-clk lsdio1-pwr  memmcemmc-clk oKQemmc-cmd oKQemmc-pwr  memmc-bus1 memmc-bus4@ mmmmemmc-bus8 ooooooooKQemmc-reset  mKQspi0spi0-clk  mK Q spi0-cs0  mK#Q#spi0-tx mK!Q!spi0-rx mK"Q"spi0-cs1 mspi1spi1-clk  mK%Q%spi1-cs0  mK(Q(spi1-rx mK'Q'spi1-tx mK&Q&spi2spi2-cs1 mspi2-clk mK)Q)spi2-cs0 mK,Q,spi2-rx mK+Q+spi2-tx  mK*Q*uart0uart0-xfer mlK5Q5uart0-cts mK6Q6uart0-rts lK7Q7uart1uart1-xfer m lK8Q8uart1-cts  muart1-rts  luart2uart2-xfer mlK9Q9uart3uart3-xfer mlK:Q:uart3-cts  muart3-rts  luart4uart4-xfer  m lK;Q;uart4-cts muart4-rts ltsadcotp-gpio lK@Q@otp-out lKAQApwm0pwm0-pin lKLQLpwm1pwm1-pin lKMQMpwm2pwm2-pin lKNQNpwm3pwm3-pin lKOQOgmacrgmii-pins llllpppplll ppllrmii-pins llllllllllspdifspdif-tx  lKSQSpcfg-pull-none-drv-8ma  KoQopcfg-pull-up-drv-8ma  pcfg-output-high KrQrpcfg-output-low KqQqbuttonspwr-key-l map-lid-int-l mKtQtpwr-key-h lKsQspmicpmic-int-l mKGQGrebootap-warm-reset-h lKuQurecovery-switchrec-mode-l mtpmtpm-int-h lwrite-protectfw-wp-ap lcodechp-det mK|Q|int-codec nKKQKmic-det  mK{Q{headsetts3a227e-int-l mK1Q1backlightbl-en lKQchargerac-present-ap mKQcros-ecec-int lK$Q$suspendsuspend-l-wake qKjQjsuspend-l-sleep rKkQktrackpadtrackpad-int mK2Q2usb-hosthost1-pwr-en lKQusbotg-pwren-h lKQgpio-keys gpio-keysdefaultstpower +Power j0 1t <dlid +Lid j0 1 N <gpio-restart gpio-restart j0 defaultu _sdio-pwrseqmmc-pwrseq-simple8v ext_clockdefaultwx hyKQvcc-5vregulator-fixedvcc_5v)=OLK@gLK@ tzKHQHvcc33-sysregulator-fixed vcc33_sys)=O2Zg2Z tzKQvcc50-hdmiregulator-fixed vcc50_hdmi)= tHsound!rockchip,rockchip-audio-max98090default{| VEYRON-I2S } ~ J J  backlightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~  *  7default JB@ O'KQgpio-charger gpio-charger \mains j0defaultpanelinnolux,n116bgesimple-panelokay iP vportsportendpoint $KcQcvccsysregulator-fixedvccsys=)KzQzvcc5-host1-regulatorregulator-fixed  0 default vcc5_host1)=vcc5v-otg-regulatorregulator-fixed  0 default vcc5_host2)= #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplypinctrl-namespinctrl-0wp-gpioscap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removabledisable-wpmmc-hs200-1_8v#io-channel-cellsreset-namesdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsforce-hpdddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosvin-supplyrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiosbacklight-boot-offpwmspwm-delay-uscharger-typepower-supplybacklightenable-active-highgpio