X8||(|Dnetxeon,r89rockchip,rk3288&chosenaliases7/ethernet@ff290000A/i2c@ff650000F/i2c@ff140000K/i2c@ff660000P/i2c@ff150000U/i2c@ff160000Z/i2c@ff170000_/dwmmc@ff0f0000e/dwmmc@ff0c0000k/dwmmc@ff0d0000q/dwmmc@ff0e0000w/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 @,3?Ecpu@501cpuarm,cortex-a12?Ecpu@502cpuarm,cortex-a12?Ecpu@503cpuarm,cortex-a12?Eamba simple-busMdma-controller@ff250000arm,pl330arm,primecell%@T_, zapb_pclk?Edma-controller@ff600000arm,pl330arm,primecell`@T_, zapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@T_, zapb_pclk?BEBreserved-memoryMdma-unusable@fe000000oscillator fixed-clockn6xin24m? E timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H , a ztimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр ,Drvzbiuciuciu-driveciu-sample  @okay&8I[fpdefault~ dwmmc@ff0d0000rockchip,rk3288-dw-mshcр ,Eswzbiuciuciu-driveciu-sample ! @ disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр ,Ftxzbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр ,Guyzbiuciuciu-driveciu-sample #@ disabledsaradc@ff100000rockchip,saradc $,I[zsaradcapb_pclkW saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi,ARzspiclkapb_pclk  txrx ,pdefault~ disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi,BSzspiclkapb_pclk txrx -pdefault~ disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi,CTzspiclkapb_pclktxrx .pdefault~ disabledi2c@ff140000rockchip,rk3288-i2c >zi2c,Mpdefault~  disabledi2c@ff150000rockchip,rk3288-i2c ?zi2c,Opdefault~! disabledi2c@ff160000rockchip,rk3288-i2c @zi2c,Ppdefault~" disabledi2c@ff170000rockchip,rk3288-i2c Azi2c,Qpdefault~#okayserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7,MUzbaudclkapb_pclkpdefault~$okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8,NVzbaudclkapb_pclkpdefault~%okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9,OWzbaudclkapb_pclkpdefault~&okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :,PXzbaudclkapb_pclkpdefault~'okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;,QYzbaudclkapb_pclkpdefault~(okaythermal-zonesreserve_thermal)cpu_thermald)tripscpu_alert0%p1passive?*E*cpu_alert1%$1passive?+E+cpu_crit%_1 criticalcooling-mapsmap0<* Amap1<+ Agpu_thermald)tripsgpu_alert0%p1passive?,E,gpu_crit%_1 criticalcooling-mapsmap0<, Atsadc@ff280000rockchip,rk3288-tsadc( %,HZztsadcapb_pclk tsadc-apbpinitdefaultsleep~-P.Z-dzsokay?)E)ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq/8,fgc]Mzstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok0rgmiiinput 1 ''B@<L2pdefault~3c0lusb@ff500000 generic-ehciP ,zusbhostu4zusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T ,zotghostu5 zusb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X ,zotgotg@@ u6 zusb2-phyokayusb@ff5c0000 generic-ehci\ ,zusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <zi2c,Lpdefault~7okaypmic@40silergy,syr827@VDD_CPU, P&p>@Sgy8?Epmic@41silergy,syr828AVDD_GPU, P&p>@Sgy8rtc@51haoyu,hym8563Qxin32k&9pdefault~:pmic@5aactive-semi,act8846Zpdefault~;<regulatorsREG1VCC_DDRO&OSREG2VCC_IO2Z&2ZS?aEaREG3VDD_LOGB@&B@SREG4VCC_20&SREG5 VCCIO_SD2Z&2ZS?EREG6 VDD10_LCDB@&B@SREG7VCC_WL2Z&2ZSREG8VCCA_332Z&2ZSREG9VCC_LAN2Z&2ZS?0E0REG10VDD_10B@&B@SREG11VCC_18w@&w@S?EREG12 VCC18_LCDw@&w@Si2c@ff660000rockchip,rk3288-i2cf =zi2c,Npdefault~= disabledpwm@ff680000rockchip,rk3288-pwmhpdefault~>,^zpwmokaypwm@ff680010rockchip,rk3288-pwmhpdefault~?,^zpwm disabledpwm@ff680020rockchip,rk3288-pwmh pdefault~@,^zpwm disabledpwm@ff680030rockchip,rk3288-pwmh0pdefault~A,^zpwm disabledbus_intmem@ff700000 mmio-sramp Mpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfds?Epower-controller!rockchip,rk3288-power-controller<hL ?EEEpd_vio@9 ,chgfdehilkjpd_hevc@11 ,oppd_video@12 ,pd_gpu@13 ,reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv/H<jk$#gׄeрxhрxh?Esyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdw?/E/edp-phyrockchip,rk3288-dp-phy,hz24m disabled?PEPio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320 ,]zphyclk?6E6usb-phy@3344,^zphyclk?4E4usb-phy@348H,_zphyclk?5E5watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt,p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif% zhclkmclk,TBtx 6pdefault~C/ disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5BBtxrxzi2s_hclki2s_clk,Rpdefault~D6Q disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 ,}zaclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop ,zaclk_vopdclk_vophclk_vopkE def axiahbdclkyFokayport? E endpoint@0G?SESendpoint@1H?QEQendpoint@2I?NENiommu@ff930300rockchip,iommu  vopb_mmukE okay?FEFvop@ff940000rockchip,rk3288-vop ,zaclk_vopdclk_vophclk_vopkE  axiahbdclkyJokayport? E endpoint@0K?TETendpoint@1L?RERendpoint@2M?OEOiommu@ff940300rockchip,iommu  vopl_mmukE okay?JEJmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ ,~d zrefpclkkE / disabledportsportendpoint@0N?IEIendpoint@1O?MEMdp@ff970000rockchip,rk3288-dp@ b,iczdppclkuPzdpodp/ disabledportsport@0endpoint@0Q?HEHendpoint@1R?LELhdmi@ff980000rockchip,rk3288-dw-hdmi/ g,hm ziahbisfrkE okayportsportendpoint@0S?GEGendpoint@1T?KEKmali@ffa300004rockchip,rk3288-maliarm,mali-t760arm,mali-midgard$ jobmmugpu,UkE  disabledgpu-opp-tableoperating-points-v2?UEUopp@100000000~opp@200000000 ~opp@300000000B@opp@400000000ׄopp@500000000eOopp@600000000#Finterrupt-controller@ffc01000 arm,gic-400  @ `   ?Eefuse@ffb40000rockchip,rockchip-efuse ,q zpclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl/Mgpio0@ff750000rockchip,gpio-banku Q,@?9E9gpio1@ff780000rockchip,gpio-bankx R,Agpio2@ff790000rockchip,gpio-banky S,Bgpio3@ff7a0000rockchip,gpio-bankz T,Cgpio4@ff7b0000rockchip,gpio-bank{ U,D?1E1gpio5@ff7c0000rockchip,gpio-bank| V,Egpio6@ff7d0000rockchip,gpio-bank} W,Fgpio7@ff7e0000rockchip,gpio-bank~ X,G?]E]gpio8@ff7f0000rockchip,gpio-bank Y,Hhdmihdmi-ddc VVpcfg-pull-up?WEWpcfg-pull-down#?XEXpcfg-pull-none2?VEVpcfg-pull-none-12ma2? ?YEYsleepglobal-pwroffVddrio-pwroffVddr0-retentionWddr1-retentionWedpedp-hpd Xi2c0i2c0-xfer VV?7E7i2c1i2c1-xfer VV? E i2c2i2c2-xfer  V V?=E=i2c3i2c3-xfer VV?!E!i2c4i2c4-xfer VV?"E"i2c5i2c5-xfer VV?#E#i2s0i2s0-bus`VVVVVV?DEDsdmmcsdmmc-clkV? E sdmmc-cmdW? E sdmmc-cdW?Esdmmc-bus1Wsdmmc-bus4@WWWW?Esdio0sdio0-bus1Wsdio0-bus4@WWWWsdio0-cmdWsdio0-clkVsdio0-cdWsdio0-wpWsdio0-pwrWsdio0-bkpwrWsdio0-intWsdio1sdio1-bus1Wsdio1-bus4@WWWWsdio1-cdWsdio1-wpWsdio1-bkpwrWsdio1-intWsdio1-cmdWsdio1-clkVsdio1-pwr Wemmcemmc-clkVemmc-cmdWemmc-pwr Wemmc-bus1Wemmc-bus4@WWWWemmc-bus8WWWWWWWWspi0spi0-clk W?Espi0-cs0 W?Espi0-txW?Espi0-rxW?Espi0-cs1Wspi1spi1-clk W?Espi1-cs0 W?Espi1-rxW?Espi1-txW?Espi2spi2-cs1Wspi2-clkW?Espi2-cs0W?Espi2-rxW?Espi2-tx W?Euart0uart0-xfer WV?$E$uart0-ctsWuart0-rtsVuart1uart1-xfer W V?%E%uart1-cts Wuart1-rts Vuart2uart2-xfer WV?&E&uart3uart3-xfer WV?'E'uart3-cts Wuart3-rts Vuart4uart4-xfer  W V?(E(uart4-ctsWuart4-rtsVtsadcotp-gpio V?-E-otp-out V?.E.pwm0pwm0-pinV?>E>pwm1pwm1-pinV??E?pwm2pwm2-pinV?@E@pwm3pwm3-pinV?AEAgmacrgmii-pinsVVVVYYYYVVV YYVV?3E3rmii-pinsVVVVVVVVVVspdifspdif-tx V?CECpcfg-output-highN?[E[pcfg-output-lowZ?ZEZact8846pmic-vselZ?;E;pwr-hold[?<E<buttonspwrbtnW?\E\irir-intW?^E^pmicpmic-intW?:E:usbhost-vbus-drvV?_E_otg-vbus-drv V?`E`external-gmac-clock fixed-clocksY@ ext_gmac?2E2gpio-keys gpio-keysepdefault~\power p9vtGPIO Key Powerdir-receivergpio-ir-receiver p]pdefault~^vcc-host-regulatorregulator-fixed  9pdefault~_ vcc_hostSgvcc-otg-regulatorregulator-fixed  9 pdefault~`vcc_otgSgsdmmc-regulatorregulator-fixed sdmmc-supply2Z&2Z  ] ya?Esys-regulatorregulator-fixed sys-supplyLK@&LK@Sg?8E8 #address-cells#size-cellscompatibleinterrupt-parentethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supply#io-channel-cellsreset-namesvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-always-onregulator-boot-onvin-supplysystem-power-controller#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowautorepeatgpioslinux,codelabellinux,input-typewakeup-sourcedebounce-intervalenable-active-highstartup-delay-us