8(,firefly,firefly-rk3288-betarockchip,rk3288&7Firefly-RK3288 Betachosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000memorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEUKUreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @okay",>Oalvdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay"alvdefault dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okay",alvdefaultsaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk  txrx ,vdefault !"okayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk txrx -vdefault#$%& disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclktxrx .vdefault'()* disabledi2c@ff140000rockchip,rk3288-i2c >i2c2Mvdefault+okayi2c@ff150000rockchip,rk3288-i2c ?i2c2Ovdefault, disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pvdefault-okayi2c@ff170000rockchip,rk3288-i2c Ai2c2Qvdefault.okayEfKfserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkvdefault /01okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkvdefault2okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkvdefault3okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkvdefault4okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkvdefault5 disabledthermal-zonesreserve_thermal)6cpu_thermald)6tripscpu_alert09pEpassiveE7K7cpu_alert19$EpassiveE8K8cpu_crit9_E criticalcooling-mapsmap0P7 Umap1P8 Ugpu_thermald)6tripsgpu_alert09pEpassiveE9K9gpu_crit9_E criticalcooling-mapsmap0P9 Utsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apbvinitdefaultsleep:d;n:xsokayE6K6ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq<82fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok=inputvdefault>?@A(B3rgmii< R'B@ gCw0usb@ff500000 generic-ehciP 2usbhostDusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghostE usb2-phyokayvdefaultFusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otgotg@@ G usb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2LvdefaultHokaysyr827@40silergy,syr827@vdd_cpu Pp6J\,x@EKsyr828@41silergy,syr828Avdd_gpu Pp6EjKjhym8563@51haoyu,hym8563Qxin32k&IvdefaultJact8846@5aactive-semi,act8846ZvdefaultKLMregulatorsREG1vcc_ddrOO6REG2vcc_io2Z2Z6EKREG3vdd_log6REG4vcc_206EMKMREG5 vccio_sd2Z2Z6EKREG6 vdd10_lcdB@B@6REG7vcca_18w@w@REG8vcca_332Z2ZESKSREG9vcc_lan2Z2ZEBKBREG10vdd_10B@B@6REG11vcc_18w@w@6EKREG12 vcc18_lcdw@w@6i2c@ff660000rockchip,rk3288-i2cf =i2c2NvdefaultNokaypwm@ff680000rockchip,rk3288-pwmhvdefaultO2^pwmokaypwm@ff680010rockchip,rk3288-pwmhvdefaultP2^pwm disabledpwm@ff680020rockchip,rk3288-pwmh vdefaultQ2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0vdefaultR2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controller h EXKXpd_vio@9 2chgfdehilkjpd_hevc@11 2oppd_video@12 2pd_gpu@13 2reboot-modesyscon-reboot-mode&RB2RB@RB PRBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv<\Hjk$i#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE<K<edp-phyrockchip,rk3288-dp-phy2h24m~ disabledEcKcio-domains"rockchip,rk3288-io-voltage-domainokaySTBusbphyrockchip,rk3288-usb-phyokayusb-phy@320~ 2]phyclkEGKGusb-phy@334~42^phyclkEDKDusb-phy@348~H2_phyclkEEKEwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif  hclkmclk2TUtx 6vdefaultV< disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5UUtxrxi2s_hclki2s_clk2RvdefaultW7 disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopQX def axiahbdclk_YokayportE K endpoint@0fZEgKgendpoint@1f[EdKdendpoint@2f\EaKaiommu@ff930300rockchip,iommu  vopb_mmuQX vokayEYKYvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopQX  axiahbdclk_]okayportE K endpoint@0f^EhKhendpoint@1f_EeKeendpoint@2f`EbKbiommu@ff940300rockchip,iommu  vopl_mmuQX vokayE]K]mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkQX < disabledportsportendpoint@0faE\K\endpoint@1fbE`K`dp@ff970000rockchip,rk3288-dp@ b2icdppclkcdpodp< disabledportsport@0endpoint@0fdE[K[endpoint@1feE_K_hdmi@ff980000rockchip,rk3288-dw-hdmi< g2hm iahbisfrQX okayfportsportendpoint@0fgEZKZendpoint@1fhE^K^mali@ffa300004rockchip,rk3288-maliarm,mali-t760arm,mali-midgard$ jobmmugpu2iQX okayjgpu-opp-tableoperating-points-v2EiKiopp@100000000~opp@200000000 ~opp@300000000B@opp@400000000ׄopp@500000000eOopp@600000000#Finterrupt-controller@ffc01000 arm,gic-400  @ `   EKefuse@ffb40000rockchip,rockchip-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl<Sgpio0@ff750000rockchip,gpio-banku Q2@EtKtgpio1@ff780000rockchip,gpio-bankx R2Agpio2@ff790000rockchip,gpio-banky S2Bgpio3@ff7a0000rockchip,gpio-bankz T2Cgpio4@ff7b0000rockchip,gpio-bank{ U2DECKCgpio5@ff7c0000rockchip,gpio-bank| V2Egpio6@ff7d0000rockchip,gpio-bank} W2Fgpio7@ff7e0000rockchip,gpio-bank~ X2GEIKIgpio8@ff7f0000rockchip,gpio-bank Y2HEvKvhdmihdmi-ddc kkpcfg-pull-upElKlpcfg-pull-down!EmKmpcfg-pull-none0EkKkpcfg-pull-none-12ma0= EnKnsleepglobal-pwroffkddrio-pwroffkddr0-retentionlddr1-retentionledpedp-hpd mi2c0i2c0-xfer kkEHKHi2c1i2c1-xfer kkE+K+i2c2i2c2-xfer  k kENKNi2c3i2c3-xfer kkE,K,i2c4i2c4-xfer kkE-K-i2c5i2c5-xfer kkE.K.i2s0i2s0-bus`kkkkkkEWKWsdmmcsdmmc-clknE K sdmmc-cmdoE K sdmmc-cdlEKsdmmc-bus1lsdmmc-bus4@ooooEKsdmmc-pwr kEyKysdio0sdio0-bus1lsdio0-bus4@llllEKsdio0-cmdlEKsdio0-clkkEKsdio0-cdlsdio0-wplsdio0-pwrlsdio0-bkpwrlsdio0-intlsdio1sdio1-bus1lsdio1-bus4@llllsdio1-cdlsdio1-wplsdio1-bkpwrlsdio1-intlsdio1-cmdlsdio1-clkksdio1-pwr lemmcemmc-clkkEKemmc-cmdlEKemmc-pwr lEKemmc-bus1lemmc-bus4@llllemmc-bus8llllllllEKspi0spi0-clk lEKspi0-cs0 lEKspi0-txlE K spi0-rxlE!K!spi0-cs1lE"K"spi1spi1-clk lE#K#spi1-cs0 lE&K&spi1-rxlE%K%spi1-txlE$K$spi2spi2-cs1lspi2-clklE'K'spi2-cs0lE*K*spi2-rxlE)K)spi2-tx lE(K(uart0uart0-xfer lkE/K/uart0-ctslE0K0uart0-rtskE1K1uart1uart1-xfer l kE2K2uart1-cts luart1-rts kuart2uart2-xfer lkE3K3uart3uart3-xfer lkE4K4uart3-cts luart3-rts kuart4uart4-xfer  l kE5K5uart4-ctsluart4-rtsktsadcotp-gpio kE:K:otp-out kE;K;pwm0pwm0-pinkEOKOpwm1pwm1-pinkEPKPpwm2pwm2-pinkEQKQpwm3pwm3-pinkERKRgmacrgmii-pinskkkknnnnkkk nnkkE>K>rmii-pinskkkkkkkkkkphy-int lEAKAphy-pmeblE@K@phy-rstpE?K?spdifspdif-tx kEVKVpcfg-output-highLEpKppcfg-output-lowXEqKqpcfg-pull-up-drv-12ma= EoKoact8846pwr-holdpELKLpmic-vselqEKKKdvpdvp-pwr kE}K}hym8563rtc-intlEJKJkeyspwr-keylEuKuledspower-ledkExKxwork-ledkEwKwusb_hosthost-vbus-drvkEzKzusbhub-rstpEFKFusb_otgotg-vbus-drv kE|K|irir-intlEsKsdovdd-1v8-regulatorregulator-fixed dovdd_1v8w@w@rETKTexternal-gmac-clock fixed-clocksY@ ext_gmacE=K=ir-receivergpio-ir-receivervdefaults cIgpio-keys gpio-keyspoweri ct wGPIO Power}tvdefaultuleds gpio-ledswork cvwfirefly:blue:user rc-feedbackvdefaultwpower cvwfirefly:green:power default-onvdefaultxvsys-regulatorregulator-fixedvcc_sysLK@LK@6JEKsdmmc-regulatorregulator-fixed rI vdefaultyvcc_sd2Z2ZEKflash-regulatorregulator-fixed vcc_flashw@w@EKusb-regulatorregulator-fixedvcc_5vLK@LK@6JE{K{usb-host-regulatorregulator-fixed rtvdefaultz vcc_host_5vLK@LK@6{usb-otg-regulatorregulator-fixed rt vdefault| vcc_otg_5vLK@LK@6{vcc28-dvp-regulatorregulator-fixed rt vdefault} vcc28_dvp**6ErKr #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsreset-namesvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmafcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowgpioswakeup-sourcelabellinux,codelinux,default-triggerstartup-delay-usenable-active-high