<84( isee,omap5-igep0050ti,omap5&7IGEPv5chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000 /connectorcpuscpu@0cpuarm,cortex-a15B@,`cpucpu@1cpuarm,cortex-a15thermal-zonescpu_thermal4Btripscpu_alertR^passivecpu_critRH^ criticalcooling-mapsmap0i ngpu_thermal4Btripsgpu_critRH^ criticalcore_thermal4Btripscore_critRH^ criticaltimerarm,armv7-timer0}   &pmuarm,cortex-a15-pmu}interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!` &interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&socti,omap-inframpu ti,omap4-mpumpuocpti,omap5-l3-nocsimple-busĀl3_main_1l3_main_2l3_main_30D D0E@}  l4@4a000000ti,omap5-l4-cfgsimple-bus J"scm@2000ti,omap5-scm-coresimple-bus   scm_conf@0sysconscm@2800%ti,omap5-scm-padconf-coresimple-bus (pinmux@40 ti,omap5-padconfpinctrl-single@ default ~~pinmux_twl6040_pins"ttpinmux_mcpdm_pins("B\^`bpinmux_mcbsp1_pins "LN PR pinmux_mcbsp2_pins "TVXZpinmux_i2c1_pins"llpinmux_mcspi2_pins "zzpinmux_mcspi3_pins "xz|~{{pinmux_mmc3_pins0"dfhjlnpinmux_wlan_pins"|palmas_msecure_pins"@nnpinmux_usbhost_pins0"pn  pinmux_led_gpio_pins"  pinmux_uart1_pins "`bdf||pinmux_uart3_pins"}}pinmux_uart5_pins "prtvpinmux_dss_hdmi_pins"pinmux_tpd12s015_pins"pinmux_i2c4_pins"yypinctrl_power_button_pin"Fomap5_padconf_global@5a0sysconsimple-bus   pbias_regulator@60ti,pbias-omap5ti,pbias-omap`6 pbias_mmc_omap5=pbias_mmc_omap5Lw@d-cm_core_aon@4000ti,omap5-cm-core-aon@ clockspad_clks_src_ck| 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`dlhdpll_mpu_m2_ck@170|ti,divider-clockpper_dpll_hs_clk_div|fixed-factor-clock..usb_dpll_hs_clk_div|fixed-factor-clock44l3_iclk_div@100|ti,divider-clock!!gpu_l3_iclk|fixed-factor-clock!l4_root_clk_div@100|ti,divider-clock!slimbus1_slimbus_clk@560|ti,gate-clock" `aess_fclk@528|ti,divider-clock#(dmic_sync_mux_ck@538| ti,mux-clock $%&8''dmic_gfclk@538| ti,mux-clock '("8mcasp_sync_mux_ck@540| ti,mux-clock $%&@))mcasp_gfclk@540| ti,mux-clock )("@mcbsp1_sync_mux_ck@548| ti,mux-clock $%&H**mcbsp1_gfclk@548| ti,mux-clock *("Hmcbsp2_sync_mux_ck@550| ti,mux-clock $%&P++mcbsp2_gfclk@550| ti,mux-clock +("Pmcbsp3_sync_mux_ck@558| ti,mux-clock $%&X,,mcbsp3_gfclk@558| ti,mux-clock ,("Xtimer5_gfclk_mux@568| ti,mux-clock%-htimer6_gfclk_mux@570| ti,mux-clock%-ptimer7_gfclk_mux@578| ti,mux-clock%-xtimer8_gfclk_mux@580| ti,mux-clock%-dummy_ck| fixed-clockclockdomainscm_core@8000ti,omap5-cm-core0clocksdpll_per_byp_mux@14c| ti,mux-clock.L//dpll_per_ck@140|ti,omap4-dpll-clock/@DLH00dpll_per_x2_ck|ti,omap4-dpll-x2-clock011dpll_per_h11x2_ck@158|ti,divider-clock1?X77dpll_per_h12x2_ck@15c|ti,divider-clock1?\<<dpll_per_h14x2_ck@164|ti,divider-clock1?dGGdpll_per_m2_ck@150|ti,divider-clock0P99dpll_per_m2x2_ck@150|ti,divider-clock1P88dpll_per_m3x2_ck@154|ti,divider-clock1TUUdpll_unipro1_ck@200|ti,omap4-dpll-clock 22dpll_unipro1_clkdcoldo|fixed-factor-clock2>>dpll_unipro1_m2_ck@210|ti,divider-clock2??dpll_unipro2_ck@1c0|ti,omap4-dpll-clock33dpll_unipro2_clkdcoldo|fixed-factor-clock3dpll_unipro2_m2_ck@1d0|ti,divider-clock3dpll_usb_byp_mux@18c| ti,mux-clock455dpll_usb_ck@180|ti,omap4-dpll-j-type-clock566dpll_usb_clkdcoldo|fixed-factor-clock6EEdpll_usb_m2_ck@190|ti,divider-clock6::func_128m_clk|fixed-factor-clock7HHfunc_12m_fclk|fixed-factor-clock8func_24m_clk|fixed-factor-clock9&&func_48m_fclk|fixed-factor-clock8;;func_96m_fclk|fixed-factor-clock8==l3init_60m_fclk@104|ti,divider-clock:@@dss_32khz_clk@1420|ti,gate-clock-  dss_48mhz_clk@1420|ti,gate-clock;  dss_dss_clk@1420|ti,gate-clock< dss_sys_clk@1420|ti,gate-clock%  gpio2_dbclk@1060|ti,gate-clock-`gpio3_dbclk@1068|ti,gate-clock-hgpio4_dbclk@1070|ti,gate-clock-pgpio5_dbclk@1078|ti,gate-clock-xgpio6_dbclk@1080|ti,gate-clock-gpio7_dbclk@1110|ti,gate-clock-gpio8_dbclk@1118|ti,gate-clock-iss_ctrlclk@1320|ti,gate-clock= lli_txphy_clk@f20|ti,gate-clock> lli_txphy_ls_clk@f20|ti,gate-clock?  mmc1_32khz_clk@1628|ti,gate-clock-(sata_ref_clk@1688|ti,gate-clockusb_host_hs_hsic480m_p1_clk@1658|ti,gate-clock: Xusb_host_hs_hsic480m_p2_clk@1658|ti,gate-clock:Xusb_host_hs_hsic480m_p3_clk@1658|ti,gate-clock:Xusb_host_hs_hsic60m_p1_clk@1658|ti,gate-clock@ Xusb_host_hs_hsic60m_p2_clk@1658|ti,gate-clock@ Xusb_host_hs_hsic60m_p3_clk@1658|ti,gate-clock@Xutmi_p1_gfclk@1658| ti,mux-clock@AXBBusb_host_hs_utmi_p1_clk@1658|ti,gate-clockBXutmi_p2_gfclk@1658| ti,mux-clock@CXDDusb_host_hs_utmi_p2_clk@1658|ti,gate-clockD Xusb_host_hs_utmi_p3_clk@1658|ti,gate-clock@ Xusb_otg_ss_refclk960m@16f0|ti,gate-clockEusb_phy_cm_clk32k@640|ti,gate-clock-@usb_tll_hs_usb_ch0_clk@1668|ti,gate-clock@husb_tll_hs_usb_ch1_clk@1668|ti,gate-clock@ husb_tll_hs_usb_ch2_clk@1668|ti,gate-clock@ hfdif_fclk@1328|ti,divider-clock7(gpu_core_gclk_mux@1520| ti,mux-clockFG gpu_hyd_gclk_mux@1520| ti,mux-clockFG hsi_fclk@1638|ti,divider-clock88mmc1_fclk_mux@1628| ti,mux-clockH8(IImmc1_fclk@1628|ti,divider-clockI(mmc2_fclk_mux@1630| ti,mux-clockH80JJmmc2_fclk@1630|ti,divider-clockJ0timer10_gfclk_mux@1028| ti,mux-clock-(timer11_gfclk_mux@1030| ti,mux-clock-0timer2_gfclk_mux@1038| ti,mux-clock-8timer3_gfclk_mux@1040| ti,mux-clock-@timer4_gfclk_mux@1048| ti,mux-clock-Htimer9_gfclk_mux@1050| ti,mux-clock-Pclockdomainsl3init_clkdmti,clockdomain6l4@4ae00000ti,omap5-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,omap5-prm`0 } clockssys_clkin@110| ti,mux-clockKLMNOPQabe_dpll_bypass_clk_mux@108| ti,mux-clock-abe_dpll_clk_mux@10c| ti,mux-clock- custefuse_sys_gfclk_div|fixed-factor-clockdss_syc_gfclk_div|fixed-factor-clock%%wkupaon_iclk_mux@108| ti,mux-clockRSSl3instr_ts_gclk_div|fixed-factor-clockSgpio1_dbclk@1938|ti,gate-clock-8timer1_gfclk_mux@1940| ti,mux-clock-@clockdomainsscrm@a000ti,omap5-scrm clocksauxclk0_src_gate_ck@310| ti,composite-no-wait-gate-clockTVVauxclk0_src_mux_ck@310|ti,composite-mux-clock TUWWauxclk0_src_ck|ti,composite-clockVWXXauxclk0_ck@310|ti,divider-clockXeeauxclk1_src_gate_ck@314| ti,composite-no-wait-gate-clockTYYauxclk1_src_mux_ck@314|ti,composite-mux-clock TUZZauxclk1_src_ck|ti,composite-clockYZ[[auxclk1_ck@314|ti,divider-clock[ffauxclk2_src_gate_ck@318| ti,composite-no-wait-gate-clockT\\auxclk2_src_mux_ck@318|ti,composite-mux-clock TU]]auxclk2_src_ck|ti,composite-clock\]^^auxclk2_ck@318|ti,divider-clock^ggauxclk3_src_gate_ck@31c| ti,composite-no-wait-gate-clockT__auxclk3_src_mux_ck@31c|ti,composite-mux-clock TU``auxclk3_src_ck|ti,composite-clock_`aaauxclk3_ck@31c|ti,divider-clockahhauxclk4_src_gate_ck@320| ti,composite-no-wait-gate-clockT bbauxclk4_src_mux_ck@320|ti,composite-mux-clock TU ccauxclk4_src_ck|ti,composite-clockbcddauxclk4_ck@320|ti,divider-clockd iiauxclkreq0_ck@210| ti,mux-clockefghiauxclkreq1_ck@214| ti,mux-clockefghiauxclkreq2_ck@218| ti,mux-clockefghiauxclkreq3_ck@21c| ti,mux-clockefghiclockdomainspinmux@c840 ti,omap5-padconfpinctrl-single@< defaultjpinmux_palmas_sys_nirq_pins"(mmpinmux_usbhost_wkup_pins"jjpinmux_wlcore_irq_pin"ocmcram@40300000 mmio-sram@0dma-controller@4a056000ti,omap4430-sdmaJ`0}   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}+timer7timer@4013e000ti,omap5430-timer@I },timer8timer@4803e000ti,omap5430-timerH }-timer9timer@48086000ti,omap5430-timerH` }.timer10timer@48088000ti,omap5430-timerH }/timer11wdt@4ae14000ti,omap5-wdtti,omap3-wdtJ@ }P wd_timer2dmm@4e000000 ti,omap5-dmmN }qdmmemif@4c000000 ti,emif-4d5emif1L }n0Eemif@4d000000 ti,emif-4d5emif2M }o0Eomap_dwc3@4a020000ti,dwc3 usb_otg_ssJ }]Xbidwc3@4a030000 snps,dwc3J$}\\]peripheralhostotguzusb2-phyusb3-phyotgbocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1usb2phy@4a084000 ti,omap-usb2J@|wkupclkrefclkusb3phy@4a084400 ti,omap-usb3JDJHdJL@uphy_rxphy_txpll_ctrlp wkupclksysclkrefclkusbhstll@4a062000 ti,usbhs-tllJ  }N usb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ usb_host_hs @AC3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ehci-hsic ehci-hsicohci@4a064800ti,ohci-omap3JH }Lehci@4a064c00 ti,ehci-omapJL }M ubandgap@4a0021e0 J! J#, J#,J#< }~ti,omap5430-bandgapocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4a096000ti,phy-pipe3-sataJ `J ddJ h@uphy_rxphy_txpll_ctrltsysclkrefclksata@4a141100snps,dwc-ahciJJ }6u zsata-physatadss@58000000 ti,omap5-dssXHok dss_corefckdispc@58001000ti,omap5-dispcX } dss_dispcfckencoder@58002000ti,omap5-rfbiX  Hdisabled dss_rfbi!fckickencoder@58004000 ti,omap5-dsiX@XB@XC@uprotophypll }5 Hdisabled dss_dsi1 fcksys_clkencoder@58005000 ti,omap5-dsiXX@X@uprotophypll }7 Hdisabled dss_dsi2 fcksys_clkencoder@58060000ti,omap5-hdmi XXXXuwppllphycore }eHok dss_hdmi fcksys_clkkL audio_tx defaultportendpointregulator-abb-mpu ti,abb-v2=abb_mpu 2  J|J`J!J3ubase-addressint-addressefuse-addressldo-address # < T0 h,regulator-abb-mm ti,abb-v2=abb_mm 2  J|J`J!J3ubase-addressint-addressefuse-addressldo-address # < T0 hfixedregulator-vmainregulator-fixed=vmainLLK@dLK@fixedregulator-vsys_cobraregulator-fixed =vsys_cobra tLLK@dLK@qqfixedregulator-vdds_1v8_mainregulator-fixed=vdds_1v8_main tuLw@dw@rrfixedregulator-mmcsdregulator-fixed =vmmcsd_fixedL-d-sssdhci0_pwrseqmmc-pwrseq-simplew ext_clockfixedregulator-mmcsdioregulator-fixed=vmmcsdio_fixedLw@dw@ x t p defaulthsusb2_phyusb-nop-xceiv f main_clk$hsusb3_phyusb-nop-xceiv encoder ti,tpd12s015 default<n portsport@0endpointport@1endpointconnectorhdmi-connector hdmibportendpointsoundti,abe-twl6040 omap5-uevm  $   Headset StereophoneHSOLHeadset StereophoneHSORLine OutAUXLLine OutAUXRHSMICHeadset MicHeadset MicHeadset Mic BiasAFMLLine InAFMRLine Inmemory@80000000memorygpio_keys gpio-keys defaultpower-button Power Button t nleds gpio-ledsled@1 board:green:usr0 n offled@2 board:red:usr1 n offled@3 board:blue:usr1 n off #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5display0device_typeregoperating-pointsclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplylinux,phandlepolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodssramrangesdma-rangespinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,index-power-of-twoti,dividersti,set-rate-parent#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-highline-namedmasdma-namesgpmc,num-csgpmc,num-waitpinsti,system-power-controllerti,mux-pad1ti,mux-pad2ti,enable-vbus-detectionti,enable-id-detectionti,wakeupid-gpiosti,backup-battery-chargeableti,backup-battery-charge-high-current#io-channel-cellsti,channel0-current-microampti,channel3-current-microampinterrupt-namesti,ldo6-vibratorsmps123-in-supplysmps45-in-supplysmps6-in-supplysmps7-in-supplysmps8-in-supplysmps9-in-supplysmps10_out2-in-supplysmps10_out1-in-supplyldo1-in-supplyldo2-in-supplyldo3-in-supplyldo4-in-supplyldo5-in-supplyldo6-in-supplyldo7-in-supplyldo8-in-supplyldo9-in-supplyldoln-in-supplyldousb-in-supplyregulator-always-onregulator-boot-onti,smps-rangestatuswakeup-sourcevio-supplyv2v1-supplyenable-active-highti,audpwron-gpio#hwlock-cellsti,spi-num-csinterrupts-extendedti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablemmc-pwrseqcap-power-off-cardref-clock-frequency#iommu-cellsti,iommu-bus-err-backreg-namesti,buffer-size#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertutmi-modeextconvbus-supplyphysphy-namesdr_modesyscon-phy-power#phy-cellsport2-modeport3-mode#thermal-sensor-cellsports-implementedvdda-supplyremote-endpointti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infovin-supplystartup-delay-usreset-gpioslabelti,modelti,jack-detectionti,mclk-freqti,mcpdmti,twl6040ti,audio-routinglinux,codedefault-state