Sy8G( G:ti,am572x-beagle-x15ti,am5728ti,dra742ti,dra74ti,dra7&!7TI AM5728 BeagleBoard-X15 rev B1chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000/ocp/serial@48420000/ocp/serial@48422000/ocp/serial@48424000/ocp/serial@4ae2b000&/ocp/ethernet@48484000/slave@48480200&/ocp/ethernet@48484000/slave@48480300/ocp/can@4ae3c000/ocp/can@48480000/ocp/qspi@4b300000/ocp/i2c@48060000/rtc@6f-/ocp/i2c@48070000/tps659038@58/tps659038_rtc/ocp/rtc@48838000 /connectortimerarm,armv7-timer0   &interrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!`   & interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(& cpuscpu@0(cpuarm,cortex-a154B@,@ELcpuXfx cpu@1(cpuarm,cortex-a15socti,omap-inframpu ti,omap5-mpumpuocpti,dra7-l3-nocsimple-busȀl3_main_1l3_main_2 DE  l4@4a000000ti,dra7-l4-cfgsimple-bus J"scm@2000ti,dra7-scm-coresimple-bus   scm_conf@0sysconsimple-bus  pbias_regulator@e00ti,pbias-dra7ti,pbias-omappbias_mmc_omap5pbias_mmc_omap5w@- clocksdss_deshdcp_clk@558-ti,gate-clockE:Xehrpwm0_tbclk@558-ti,gate-clockE:X ehrpwm1_tbclk@558-ti,gate-clockE:X ehrpwm2_tbclk@558-ti,gate-clockE:X sys_32k_ck- ti,mux-clockE :J Jpinmux@1400ti,dra7-padconfpinctrl-singlehG e? mmc1_pins_default8lTX\`dh mmc2_pins_defaultP scm_conf@1c04syscon scm_conf@1c24syscon$$ dma-router@b78ti,dra7-dma-crossbar x  dma-router@c78ti,dra7-dma-crossbar x|  cm_core_aon@5000ti,dra7-cm-core-aonP clocksatl_clkin0_ck-ti,dra7-atl-clockE = =atl_clkin1_ck-ti,dra7-atl-clockE < <atl_clkin2_ck-ti,dra7-atl-clockE ; ;atl_clkin3_ck-ti,dra7-atl-clockE : :hdmi_clkin_ck- fixed-clock+ +mlb_clkin_ck- fixed-clock mlbp_clkin_ck- fixed-clock pciesref_acs_clk_ck- fixed-clockT Tref_clkin0_ck- fixed-clock? ?ref_clkin1_ck- fixed-clock@ @ref_clkin2_ck- fixed-clockA Aref_clkin3_ck- fixed-clockB Brmii_clk_ck- fixed-clockk ksdvenc_clkin_ck- fixed-clocksecure_32k_clk_src_ck- fixed-clock sys_clk32_crystal_ck- fixed-clock  sys_clk32_pseudo_ck-fixed-factor-clockEb  virt_12000000_ck- fixed-clockx xvirt_13000000_ck- fixed-clock]@virt_16800000_ck- fixed-clockYz zvirt_19200000_ck- fixed-clock${ {virt_20000000_ck- fixed-clock1-y yvirt_26000000_ck- fixed-clock| |virt_27000000_ck- fixed-clock} }virt_38400000_ck- fixed-clockI~ ~sys_clkin2- fixed-clockX> >usb_otg_clkin_ck- fixed-clock video1_clkin_ck- fixed-clock4 4video1_m2_clkin_ck- fixed-clock* *video2_clkin_ck- fixed-clock5 5video2_m2_clkin_ck- fixed-clock) )dpll_abe_ck@1e0-ti,omap4-dpll-m4xen-clockE dpll_abe_x2_ck-ti,omap4-dpll-x2-clockE dpll_abe_m2x2_ck@1f0-ti,divider-clockE # abe_clk@108-ti,divider-clockE: dpll_abe_m2_ck@1f0-ti,divider-clockE #i idpll_abe_m3x2_ck@1f4-ti,divider-clockE # dpll_core_byp_mux@12c- ti,mux-clockE:, dpll_core_ck@120-ti,omap4-dpll-core-clockE $,( dpll_core_x2_ck-ti,omap4-dpll-x2-clockE dpll_core_h12x2_ck@13c-ti,divider-clockE?< # mpu_dpll_hs_clk_div-fixed-factor-clockE dpll_mpu_ck@160-ti,omap5-mpu-dpll-clockE`dlh dpll_mpu_m2_ck@170-ti,divider-clockEp # mpu_dclk_div-fixed-factor-clockE dsp_dpll_hs_clk_div-fixed-factor-clockE dpll_dsp_byp_mux@240- ti,mux-clockE:@ dpll_dsp_ck@234-ti,omap4-dpll-clockE48@< dpll_dsp_m2_ck@244-ti,divider-clockED # iva_dpll_hs_clk_div-fixed-factor-clockE dpll_iva_byp_mux@1ac- ti,mux-clockE: dpll_iva_ck@1a0-ti,omap4-dpll-clockE  dpll_iva_m2_ck@1b0-ti,divider-clockE  #! !iva_dclk-fixed-factor-clockE! dpll_gpu_byp_mux@2e4- ti,mux-clockE:" "dpll_gpu_ck@2d8-ti,omap4-dpll-clockE"# #dpll_gpu_m2_ck@2e8-ti,divider-clockE# #n ndpll_core_m2_ck@130-ti,divider-clockE0 #$ $core_dpll_out_dclk_div-fixed-factor-clockE$ dpll_ddr_byp_mux@21c- ti,mux-clockE:% %dpll_ddr_ck@210-ti,omap4-dpll-clockE%& &dpll_ddr_m2_ck@220-ti,divider-clockE&  # dpll_gmac_byp_mux@2b4- ti,mux-clockE:' 'dpll_gmac_ck@2a8-ti,omap4-dpll-clockE'( (dpll_gmac_m2_ck@2b8-ti,divider-clockE( # video2_dclk_div-fixed-factor-clockE) video1_dclk_div-fixed-factor-clockE* hdmi_dclk_div-fixed-factor-clockE+ per_dpll_hs_clk_div-fixed-factor-clockEX Xusb_dpll_hs_clk_div-fixed-factor-clockE\ \eve_dpll_hs_clk_div-fixed-factor-clockE, ,dpll_eve_byp_mux@290- ti,mux-clockE,:- -dpll_eve_ck@284-ti,omap4-dpll-clockE-. .dpll_eve_m2_ck@294-ti,divider-clockE. #/ /eve_dclk_div-fixed-factor-clockE/ dpll_core_h13x2_ck@140-ti,divider-clockE?@ #dpll_core_h14x2_ck@144-ti,divider-clockE?D #l ldpll_core_h22x2_ck@154-ti,divider-clockE?T #6 6dpll_core_h23x2_ck@158-ti,divider-clockE?X #w wdpll_core_h24x2_ck@15c-ti,divider-clockE?\ #dpll_ddr_x2_ck-ti,omap4-dpll-x2-clockE&0 0dpll_ddr_h11x2_ck@228-ti,divider-clockE0?( #dpll_dsp_x2_ck-ti,omap4-dpll-x2-clockE1 1dpll_dsp_m3x2_ck@248-ti,divider-clockE1H # dpll_gmac_x2_ck-ti,omap4-dpll-x2-clockE(2 2dpll_gmac_h11x2_ck@2c0-ti,divider-clockE2? #3 3dpll_gmac_h12x2_ck@2c4-ti,divider-clockE2? #dpll_gmac_h13x2_ck@2c8-ti,divider-clockE2? #dpll_gmac_m3x2_ck@2bc-ti,divider-clockE2 #gmii_m_clk_div-fixed-factor-clockE3hdmi_clk2_div-fixed-factor-clockE+H Hhdmi_div_clk-fixed-factor-clockE+N Nl3_iclk_div@100-ti,divider-clock:E: l4_root_clk_div-fixed-factor-clockE video1_clk2_div-fixed-factor-clockE4F Fvideo1_div_clk-fixed-factor-clockE4L Lvideo2_clk2_div-fixed-factor-clockE5G Gvideo2_div_clk-fixed-factor-clockE5M Mipu1_gfclk_mux@520- ti,mux-clockE6: mcasp1_ahclkr_mux@550- ti,mux-clock8E789:;<=>?@ABCD:P mcasp1_ahclkx_mux@550- ti,mux-clock8E789:;<=>?@ABCD:P mcasp1_aux_gfclk_mux@550- ti,mux-clockEEFGH:P timer5_gfclk_mux@558- ti,mux-clock0EIJ>?@ABKLMNO:Xtimer6_gfclk_mux@560- ti,mux-clock0EIJ>?@ABKLMNO:`timer7_gfclk_mux@568- ti,mux-clock0EIJ>?@ABKLMNO:htimer8_gfclk_mux@570- ti,mux-clock0EIJ>?@ABKLMNO:puart6_gfclk_mux@580- ti,mux-clockEPQ:dummy_ck- fixed-clockclockdomainscm_core@8000ti,dra7-cm-core0clocksdpll_pcie_ref_ck@200-ti,omap4-dpll-clockE R Rdpll_pcie_ref_m2ldo_ck@210-ti,divider-clockER #S Sapll_pcie_in_clk_mux@4ae06118 ti,mux-clockEST-:U Uapll_pcie_ck@21c-ti,dra7-apll-clockEUR V Voptfclk_pciephy1_32khz@4a0093b0ti,gate-clockEJ-: optfclk_pciephy2_32khz@4a0093b8ti,gate-clockEJ-: optfclk_pciephy_div@4a00821cti,divider-clockEV-P:W Woptfclk_pciephy1_clk@4a0093b0ti,gate-clockEV-:  optfclk_pciephy2_clk@4a0093b8ti,gate-clockEV-:  optfclk_pciephy1_div_clk@4a0093b0ti,gate-clockEW-:  optfclk_pciephy2_div_clk@4a0093b8ti,gate-clockEW-:  apll_pcie_clkvcoldo-fixed-factor-clockEVapll_pcie_clkvcoldo_div-fixed-factor-clockEVapll_pcie_m2_ck-fixed-factor-clockEV dpll_per_byp_mux@14c- ti,mux-clockEX:LY Ydpll_per_ck@140-ti,omap4-dpll-clockEY@DLHZ Zdpll_per_m2_ck@150-ti,divider-clockEZP #[ [func_96m_aon_dclk_div-fixed-factor-clockE[ dpll_usb_byp_mux@18c- ti,mux-clockE\:] ]dpll_usb_ck@180-ti,omap4-dpll-j-type-clockE]^ ^dpll_usb_m2_ck@190-ti,divider-clockE^ #a adpll_pcie_ref_m2_ck@210-ti,divider-clockER # dpll_per_x2_ck-ti,omap4-dpll-x2-clockEZ_ _dpll_per_h11x2_ck@158-ti,divider-clockE_?X #` `dpll_per_h12x2_ck@15c-ti,divider-clockE_?\ #d ddpll_per_h13x2_ck@160-ti,divider-clockE_?` #u udpll_per_h14x2_ck@164-ti,divider-clockE_?d #m mdpll_per_m2x2_ck@150-ti,divider-clockE_P #Q Qdpll_usb_clkdcoldo-fixed-factor-clockE^c cfunc_128m_clk-fixed-factor-clockE`p pfunc_12m_fclk-fixed-factor-clockEQfunc_24m_clk-fixed-factor-clockE[9 9func_48m_fclk-fixed-factor-clockEQP Pfunc_96m_fclk-fixed-factor-clockEQl3init_60m_fclk@104-ti,divider-clockEaPclkout2_clk@6b0-ti,gate-clockEb: l3init_960m_gfclk@6c0-ti,gate-clockEc:h hdss_32khz_clk@1120-ti,gate-clockEJ:  dss_48mhz_clk@1120-ti,gate-clockEP:   dss_dss_clk@1120-ti,gate-clockEd: \ dss_hdmi_clk@1120-ti,gate-clockEe:   dss_video1_clk@1120-ti,gate-clockEf:   dss_video2_clk@1120-ti,gate-clockEg:   gpio2_dbclk@1760-ti,gate-clockEJ:`gpio3_dbclk@1768-ti,gate-clockEJ:hgpio4_dbclk@1770-ti,gate-clockEJ:pgpio5_dbclk@1778-ti,gate-clockEJ:xgpio6_dbclk@1780-ti,gate-clockEJ:gpio7_dbclk@1810-ti,gate-clockEJ:gpio8_dbclk@1818-ti,gate-clockEJ:mmc1_clk32k@1328-ti,gate-clockEJ:(mmc2_clk32k@1330-ti,gate-clockEJ:0mmc3_clk32k@1820-ti,gate-clockEJ: mmc4_clk32k@1828-ti,gate-clockEJ:(sata_ref_clk@1388-ti,gate-clockE: usb_otg_ss1_refclk960m@13f0-ti,gate-clockEh: usb_otg_ss2_refclk960m@1340-ti,gate-clockEh:@ usb_phy1_always_on_clk32k@640-ti,gate-clockEJ:@ usb_phy2_always_on_clk32k@688-ti,gate-clockEJ: usb_phy3_always_on_clk32k@698-ti,gate-clockEJ: atl_dpll_clk_mux@c00- ti,mux-clockEJ45+: j jatl_gfclk_mux@c00- ti,mux-clock Eij:   rmii_50mhz_clk_mux@13d0- ti,mux-clockE3k:gmac_rft_clk_mux@13d0- ti,mux-clockE45i+: gpu_core_gclk_mux@1220- ti,mux-clock Elmn: gpu_hyd_gclk_mux@1220- ti,mux-clock Elmn: l3instr_ts_gclk_div@e50-ti,divider-clockEo:P P mcasp2_ahclkr_mux@1860- ti,mux-clock8E789:;<=>?@ABCD:` mcasp2_ahclkx_mux@1860- ti,mux-clock8E789:;<=>?@ABCD:` mcasp2_aux_gfclk_mux@1860- ti,mux-clockEEFGH:` mcasp3_ahclkx_mux@1868- ti,mux-clock8E789:;<=>?@ABCD:h mcasp3_aux_gfclk_mux@1868- ti,mux-clockEEFGH:h mcasp4_ahclkx_mux@1898- ti,mux-clock8E789:;<=>?@ABCD: mcasp4_aux_gfclk_mux@1898- ti,mux-clockEEFGH: mcasp5_ahclkx_mux@1878- ti,mux-clock8E789:;<=>?@ABCD:x mcasp5_aux_gfclk_mux@1878- ti,mux-clockEEFGH:x mcasp6_ahclkx_mux@1904- ti,mux-clock8E789:;<=>?@ABCD: mcasp6_aux_gfclk_mux@1904- ti,mux-clockEEFGH: mcasp7_ahclkx_mux@1908- ti,mux-clock8E789:;<=>?@ABCD: mcasp7_aux_gfclk_mux@1908- ti,mux-clockEEFGH: mcasp8_ahclkx_mux@1890- ti,mux-clock8E789:;<=>?@ABCD: mcasp8_aux_gfclk_mux@1890- ti,mux-clockEEFGH: mmc1_fclk_mux@1328- ti,mux-clockEpQ:(q qmmc1_fclk_div@1328-ti,divider-clockEq:(:mmc2_fclk_mux@1330- ti,mux-clockEpQ:0r rmmc2_fclk_div@1330-ti,divider-clockEr:0:mmc3_gfclk_mux@1820- ti,mux-clockEPQ: s smmc3_gfclk_div@1820-ti,divider-clockEs: :mmc4_gfclk_mux@1828- ti,mux-clockEPQ:(t tmmc4_gfclk_div@1828-ti,divider-clockEt:(:qspi_gfclk_mux@1838- ti,mux-clockEpu:8v vqspi_gfclk_div@1838-ti,divider-clockEv:8: timer10_gfclk_mux@1728- ti,mux-clock,EIJ>?@ABKLMN:(timer11_gfclk_mux@1730- ti,mux-clock,EIJ>?@ABKLMN:0timer13_gfclk_mux@17c8- ti,mux-clock,EIJ>?@ABKLMN:timer14_gfclk_mux@17d0- ti,mux-clock,EIJ>?@ABKLMN:timer15_gfclk_mux@17d8- ti,mux-clock,EIJ>?@ABKLMN:timer16_gfclk_mux@1830- ti,mux-clock,EIJ>?@ABKLMN:0timer2_gfclk_mux@1738- ti,mux-clock,EIJ>?@ABKLMN:8timer3_gfclk_mux@1740- ti,mux-clock,EIJ>?@ABKLMN:@timer4_gfclk_mux@1748- ti,mux-clock,EIJ>?@ABKLMN:Htimer9_gfclk_mux@1750- ti,mux-clock,EIJ>?@ABKLMN:Puart1_gfclk_mux@1840- ti,mux-clockEPQ:@uart2_gfclk_mux@1848- ti,mux-clockEPQ:Huart3_gfclk_mux@1850- ti,mux-clockEPQ:Puart4_gfclk_mux@1858- ti,mux-clockEPQ:Xuart5_gfclk_mux@1870- ti,mux-clockEPQ:puart7_gfclk_mux@18d0- ti,mux-clockEPQ:uart8_gfclk_mux@18e0- ti,mux-clockEPQ:uart9_gfclk_mux@18e8- ti,mux-clockEPQ:vip1_gclk_mux@1020- ti,mux-clockEw: vip2_gclk_mux@1028- ti,mux-clockEw:(vip3_gclk_mux@1030- ti,mux-clockEw:0clockdomainscoreaon_clkdmti,clockdomainE^l4@4ae00000ti,dra7-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000 ti,dra7-prm`0 clockssys_clkin1@110- ti,mux-clockExyz{|}~  abe_dpll_sys_clk_mux@118- ti,mux-clockE> abe_dpll_bypass_clk_mux@114- ti,mux-clockEJ abe_dpll_clk_mux@10c- ti,mux-clockEJ  abe_24m_fclk@11c-ti,divider-clockEP7 7aess_fclk@178-ti,divider-clockEx abe_giclk_div@174-ti,divider-clockEtK Kabe_lp_clk_div@1d8-ti,divider-clockEP  abe_sys_clk_div@120-ti,divider-clockE 8 8adc_gfclk_mux@1dc- ti,mux-clock E>Jsys_clk1_dclk_div@1c8-ti,divider-clockE@: sys_clk2_dclk_div@1cc-ti,divider-clockE>@: per_abe_x1_dclk_div@1bc-ti,divider-clockEi@: dsp_gclk_div@18c-ti,divider-clockE@: gpu_dclk@1a0-ti,divider-clockEn@: emif_phy_dclk_div@190-ti,divider-clockE@: gmac_250m_dclk_div@19c-ti,divider-clockE@: gmac_main_clk-fixed-factor-clockE l3init_480m_dclk_div@1ac-ti,divider-clockEa@: usb_otg_dclk_div@184-ti,divider-clockE@: sata_dclk_div@1c0-ti,divider-clockE@: pcie2_dclk_div@1b8-ti,divider-clockE@: pcie_dclk_div@1b4-ti,divider-clockE@: emu_dclk_div@194-ti,divider-clockE@: secure_32k_dclk_div@1c4-ti,divider-clockE@: clkoutmux0_clk_mux@158- ti,mux-clockXEXO Oclkoutmux1_clk_mux@15c- ti,mux-clockXE\clkoutmux2_clk_mux@160- ti,mux-clockXE`b bcustefuse_sys_gfclk_div-fixed-factor-clockEeve_clk@180- ti,mux-clockE/hdmi_dpll_clk_mux@164- ti,mux-clockE>de emlb_clk@134-ti,divider-clockE@4:C Cmlbp_clk@130-ti,divider-clockE@0:D Dper_abe_x1_gfclk2_div@138-ti,divider-clockEi@8:E Etimer_sys_clk_div@144-ti,divider-clockEDI Ivideo1_dpll_clk_mux@168- ti,mux-clockE>hf fvideo2_dpll_clk_mux@16c- ti,mux-clockE>lg gwkupaon_iclk_mux@108- ti,mux-clockEo ogpio1_dbclk@1838-ti,gate-clockEJ:8dcan1_sys_clk_mux@1888- ti,mux-clockE>: timer1_gfclk_mux@1840- ti,mux-clock,EIJ>?@ABKLMN:@uart10_gfclk_mux@1880- ti,mux-clockEPQ:clockdomainsscm_conf@c000sysconaxi@0 simple-busQQ0 pcie@51000000 ti,dra7-pcieQ Q L orc_dbicsti_confconfig(pci00 00ypcie1 pcie-phy0` interrupt-controller axi@1 simple-busQQ00 disabledpcie@51800000 ti,dra7-pcieQ Q L orc_dbicsti_confconfigcd(pci00000ypcie2 pcie-phy0`interrupt-controller ocmcram@40300000 mmio-sram@0 @0sram-hs@0ti,secure-ramocmcram@40400000 disabled mmio-sram@@ @@ocmcram@40500000 disabled mmio-sram@P @Pbandgap@4a0021e00J! J#, J#,J#_txrxokay/S[ep {  mcasp@4846c000ti,dra7-mcasp-audiomcasp4HF HC`ompudattxrxZ_txrxE Lfckahclkx disabledmcasp@48470000ti,dra7-mcasp-audiomcasp5HG HCompudattxrxZ_txrxE Lfckahclkx disabledmcasp@48474000ti,dra7-mcasp-audiomcasp6HG@ HDompudattxrxZ_txrxE Lfckahclkx disabledmcasp@48478000ti,dra7-mcasp-audiomcasp7HG HEompudattxrxZ_txrxE Lfckahclkx disabledmcasp@4847c000ti,dra7-mcasp-audiomcasp8HG HE@ompudattxrxZ_txrxE Lfckahclkx disabledcrossbar@4a002a48ti,irq-crossbarJ*H0&   ethernet@48484000ti,dra7-cpswti,cpswgmacE Lfckcpts     " ) 6xL FHH@HHR. W0NOPQokay bmdio@48485000ti,cpsw-mdioti,davinci_mdio davinci_mdio lB@HHP slave@48480200 u  rgmii slave@48480300 u  rgmii cpsw-phy-sel@4a002554ti,dra7xx-cpsw-phy-selJ%T ogmii-selcan@4ae3c000ti,dra7-d_candcan1J  X E disabledcan@48480000ti,dra7-d_candcan2HH  X E disableddss@58000000 ti,dra7-dssok dss_core 8(XX@TXC XTX (odsspll1_clkctrlpll1pll2_clkctrlpll2 ELfckvideo1_clkvideo2_clk dispc@58001000ti,dra7-dispcX  dss_dispcELfck 4encoder@58060000 ti,dra7-hdmi XXXXowppllphycore `ok dss_hdmiE Lfcksys_clk portendpoint  epwmss@4843e000 ti,dra746-pwmssti,am33xx-pwmssHC0epwmss0 disabledpwm@4843e200"ti,dra746-ehrpwmti,am3352-ehrpwm HCE Ltbclkfck disabledecap@4843e100ti,dra746-ecapti,am3352-ecap HCELfck disabledepwmss@48440000 ti,dra746-pwmssti,am33xx-pwmssHD0epwmss1 disabledpwm@48440200"ti,dra746-ehrpwmti,am3352-ehrpwm HDE Ltbclkfck disabledecap@48440100ti,dra746-ecapti,am3352-ecap HDELfck disabledepwmss@48442000 ti,dra746-pwmssti,am33xx-pwmssHD 0epwmss2 disabledpwm@48442200"ti,dra746-ehrpwmti,am3352-ehrpwm HD"E Ltbclkfck disabledecap@48442100ti,dra746-ecapti,am3352-ecap HD!ELfck disabledaes@4b500000 ti,omap4-aesaes1KP PZon_txrxELfckaes@4b700000 ti,omap4-aesaes2Kp ;Zrq_txrxELfckdes@480a5000 ti,omap4-desdesH P MZut_txrxELfcksham@53100000ti,omap5-shamshamK . Zw_rxELfckrng@48090000 ti,omap4-rngrngH  /ELfckdsp_system@41500000sysconAP omap_dwc3_4@48940000ti,dwc3 usb_otg_ss4H Z disabledusb@48950000 snps,dwc3Hp$YYZperipheralhostotg high-speedotgmmu@41501000ti,dra7-dsp-iommuAP  mmu0_dsp2 disabledmmu@41502000ti,dra7-dsp-iommuAP   mmu1_dsp2 disabledthermal-zonescpu_thermal   +tripscpu_alert ;8 G/passive cpu_crit ;_ G /criticalcpu_alert1 ;P G/active cooling-mapsmap0 R Wmap1 R Wgpu_thermal   +tripsgpu_crit ;_ G /criticalcore_thermal   +tripscore_crit ;_ G /criticaldspeve_thermal   +tripsdspeve_crit ;_ G /criticaliva_thermal   +tripsiva_crit ;_ G /criticalboard_thermal   +tripsboard_alert ;@ G/active board_crit ;( G /criticalcooling-mapsmap0 R Wpmuarm,cortex-a15-pmu&memory@0(memoryfixedregulator-main_12v0regulator-fixed main_12v0( fixedregulator-evm_5v0regulator-fixedevm_5v0LK@LK@ f(fixedregulator-vdd_3v3regulator-fixedvdd_3v3 f2Z2Z fixedregulator-aic_dvddregulator-fixedaic_dvdd_fixed fw@w@ fixedregulator-vttregulator-fixed vtt_fixed f2Z2Z( q  leds gpio-ledsled0 beagle-x15:usr0   heartbeat offled1 beagle-x15:usr1  cpu0 offled2 beagle-x15:usr2  mmc0 offled3 beagle-x15:usr3  disk-activity offgpio_fan gpio-fan  2 connectorhdmi-connector hdmi/aportendpoint  encoder ti,tpd12s015$  portsport@0endpoint  port@1endpoint  sound0simple-audio-card BeagleBoard-X15 LineLine OutLineLine In: Line OutLLOUTLine OutRLOUTMIC2LLine InMIC2RLine In dsp_b % G fsimple-audio-card,cpu simple-audio-card,codec E  #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9ethernet0ethernet1d_can0d_can1spi0rtc0rtc1rtc2display0interruptsinterrupt-controller#interrupt-cellsreglinux,phandledevice_typeoperating-pointsclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyvoltage-toleranceti,hwmodsrangesdma-rangesinterrupts-extendedsysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pins#dma-cellsdma-requeststi,dma-safe-mapdma-mastersclock-frequencyclock-multclock-divti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitti,index-power-of-twoti,dividersti,set-rate-parentreg-namesbus-rangenum-laneslinux,pci-domainphysphy-namesinterrupt-map-maskinterrupt-mapgpiosstatus#thermal-sensor-cellsdma-channelsinterrupt-namesti,tptcsgpio-controller#gpio-cellsti,no-reset-on-initti,no-idle-on-initdmasdma-names#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-secure#hwlock-cellsti,system-power-controllerti,palmas-override-powerholdregulator-always-onregulator-boot-onwakeup-sourceti,palmas-long-press-secondsti,enable-vbus-detectionvbus-gpio#sound-dai-cellsassigned-clocksassigned-clock-parentsadc-settle-msAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyvcc-supplyti,dual-voltti,needs-special-resetpbias-supplypinctrl-namespinctrl-0bus-widthcd-gpiosvmmc-supplyvmmc-aux-supplyti,non-removablecap-mmc-dual-data-rate#iommu-cellsti,syscon-mmuconfigti,iommu-bus-err-backti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infoti,spi-num-cssyscon-chipselectssyscon-phy-powersyscon-pllreset#phy-cellssyscon-pcsports-implementedphy-supplyutmi-modemaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirkextcongpmc,num-csgpmc,num-waitpinsti,provided-clocksop-modetdm-slotsserial-dirtx-num-evtrx-num-evtti,max-irqsti,max-crossbar-sourcesti,reg-sizeti,irqs-reservedti,irqs-skipti,irqs-safe-mapcpdma_channelsale_entriesbd_ram_sizeno_bd_rammac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftti,no-idledual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlansyscon-raminitsyscon-pll-ctrlvdda_video-supplysyscon-polvdda-supplyremote-endpoint#pwm-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicevin-supplyenable-active-highlabellinux,default-triggerdefault-stategpio-fan,speed-mapsimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,bitclock-inversionsound-dai